Microchip (ATMEL) AT93C66

Microchip (ATMEL) 93C46/56/66

		VCC Range	Min	Max
fsk	SK Freq	4.5V <= VCC <= 5.0V 2.7V <= VCC <= 5.5V 2.5V <= VCC <= 5.5V 1.8V <= VCC <= 5.5V		2MHz 1MHz 0.5MHz 0.25MHz
Twp	Write Cycle time		*DO BUSY	10ms

Instruction Set


Sample code (2003/10/01 8051)
<重構待验证 > Microchip (ATMEL) AT93C66 Re-Structure for covering AT93Cx6 >
Header File

#ifndef __93C66_H__
 #define __93C66_H__

/**************************************************************************
 * ATMEL 93C66
 */
 sbit AT93C66CS 	= 0x93;
 sbit AT93C66CK     = 0x94;
 sbit AT93C66DI 	= 0x95;
 sbit AT93C66DO 	= 0x96;

/**************************************************************************
 *Hardware pin ORG = 0, 8bit data, ORG = 1, 16bit data  
 */
 #define ORG      1
 #define READ	  0x02
 #define EWEN	  0x00
 #define ERASE    0x03
 #define WRITE    0x01
 #define ERAL     0x00
 #define WRAL     0x00
 #define EWDS     0x00
 #define EWDSADDR 0x00
#if ORG
 #define DATALEN  16
 #define ADDRLEN  8
 #define WRALADDR 0x40
 #define ERALADDR 0x80
 #define EWENADDR 0xC0
#else
 #define DATALEN  8
 #define ADDRLEN  9
 #define WRALADDR 0x0080
 #define ERALADDR 0x0100
 #define EWENADDR 0x0180
#endif
 #define uint8_t unsigned char
 void AT93C66WR(uint8_t address, uint8_t *eeData);
 void AT93C66RD( uint8_t addr, uint8_t *eeData );
 void INIT_AT93C66_BUS(); 
 void STOP_AT93C66_BUS();

#endif

AT93C66.C (10KHz )
Device Connected on a dirty box, with hugh noise and big Line Resistance/ Cap.)

#include "93C66.H"
#include <INTRINS.H>

extern void Delay50us(void); 
 /**************************************************************************
 * Toggle Clock
 */
#define Toggle_Clock  AT93C66CK =1;    \
					  Delay50us();     \
					  AT93C66CK =0;    \
					  Delay50us(); 


 /**************************************************************************
 * Write Instruction to 93C66
 */
void WR93C66INS( uint8_t CMD, uint8_t ucAddr )
{
	unsigned char i;
	AT93C66CS = 1;
	AT93C66DI = 1; //start bit
    Toggle_Clock; 
	if( CMD & 0x02 ) // OP Code 1
	  { AT93C66DI = 1;  }
    else
	  { AT93C66DI = 0;  }
    Toggle_Clock; 
	if( CMD & 0x01 ) // OP Code 0
	  { AT93C66DI = 1;  }
    else
	  { AT93C66DI = 0;  }
    Toggle_Clock; 
	for( i = ADDRLEN; i>0 ;i-- )
	  {
	    if( 0x80 & ucAddr )
		  { AT93C66DI = 1; }
		else
		  { AT93C66DI = 0; }
	    ucAddr <<= 1;
        Toggle_Clock; 
      }
}

 /**************************************************************************
 * Write word 93C66
 */
void AT93C66WR(uint8_t address, uint8_t *eeData) 
{
    unsigned char i; 
    INIT_AT93C66_BUS(); 
	WR93C66INS( EWEN , EWENADDR );
	AT93C66CS=0; 
	Delay50us(); 
    WR93C66INS( ERASE, address);	 
	AT93C66CS=0; 
	AT93C66CS=1; 
	Delay50us();  
	while( !AT93C66DO ); 	
	AT93C66CS=0; 
	Delay50us(); 
	WR93C66INS( WRITE, address );
	//AT93C66CS=1;
	//Delay50us(); 
	for( i=8; i>0; i--)
	 { 
		if(*eeData & 0x80)
		  { AT93C66DI = 1; }
		else
		  { AT93C66DI = 0; }
        Toggle_Clock; 
		*eeData <<=1;
	}
#if ORG
    ++eeData; 
	for( i=8; i>0; i--)
	 { 
		if(*eeData & 0x80)
		  { AT93C66DI = 1; }
		else
		  { AT93C66DI = 0; }
        Toggle_Clock; 
		*eeData <<=1;
	}
#endif
	AT93C66CS = 0;
	Delay50us(); 
	AT93C66CS = 1;
	Delay50us(); 
	while(!AT93C66DO);
	AT93C66CS = 0;
}

 /**************************************************************************
 * Read Byte 93C66
 */
void AT93C66RD(uint8_t addr, uint8_t *eeData )
{
	unsigned char i;

    INIT_AT93C66_BUS(); 
	WR93C66INS( READ, addr );
	//AT93C66CS = 1;
	//Delay50us(); 
	for( i=8; i>0; i--)
	 {
        Toggle_Clock; 
		*eeData <<=1;
		if( AT93C66DO ){ *eeData += 1;}
	 }
#if ORG
    eeData++;
	for( i=8; i>0; i--)
	 {
        Toggle_Clock; 
		*eeData <<=1;
		if( AT93C66DO ){ *eeData +=1; }
	 }
#endif
	AT93C66CS = 0;
}

/**************************************************************************
* START 93C66 BUS 
*/
void INIT_AT93C66_BUS()
{
   AT93C66CS = 0; 
   AT93C66CK = 0;
   AT93C66DI = 0; 
   AT93C66DO = 1; 
   Delay50us(); 
}

/**************************************************************************
*  STOP/END 93C66 BUS
*/
//void STOP_AT93C66_BUS()
//{
//   AT93C66CS = 0; 
//   AT93C66CK = 0;
//   AT93C66DI = 1; 
//   AT93C66DO = 1; 
//}

Timing / Serail Sequence.

![Timing / Serail Sequence](

AT93C46_56_57_66.pdf
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