若MDK在debug状态,按了FPGA的reset键,debug肯定飞了,MDK显示如下信息,供参考:
换个角度看,其实JLink按这个顺序读了M0的这些register。
- JLink Info: CPU could not be halted
***JLink Error: Cannot read register 15 (R15) while CPU is running
***JLink Error: Cannot read register 16 (XPSR) while CPU is running
***JLink Error: Cannot read register 0 (R0) while CPU is running
***JLink Error: Cannot read register 1 (R1) while CPU is running
***JLink Error: Cannot read register 2 (R2) while CPU is running
***JLink Error: Cannot read register 3 (R3) while CPU is running
***JLink Error: Cannot read register 4 (R4) while CPU is running
***JLink Error: Cannot read register 5 (R5) while CPU is running
***JLink Error: Cannot read register 6 (R6) while CPU is running
***JLink Error: Cannot read register 7 (R7) while CPU is running
***JLink Error: Cannot read register 8 (R8) while CPU is running
***JLink Error: Canno