### 一份简单的AT32工程的IDLE代码
#### 在本人的环境下编译没有问题
/**
* 全局变量区域
* **/
#if USART_DMA
uint8_t usart1_dma_send[USART_DMA_DATA_LEN];
uint8_t usart1_dma_recv[USART_DMA_DATA_LEN];
uint8_t usart3_dma_send[USART_DMA_DATA_LEN];
uint8_t usart3_dma_recv[USART_DMA_DATA_LEN];
#endif
/**
* @brief
* @note PA9: Tx
* PA10: Rx
* @return ** void
*/
static void USART1_GPIO_Init(void)
{
gpio_init_type gpio_init_struct;
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_9;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_10;
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pull = GPIO_PULL_UP;
gpio_init(GPIOA, &gpio_init_struct);
}
/**
* @brief
* @note PB10: Tx
* PB11: Rx
* @return ** void
*/
static void USART3_GPIO_Init(void)
{
gpio_init_type gpio_init_struct;
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_10;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOB, &gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_11;
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pull = GPIO_PULL_UP;
gpio_init(GPIOB, &gpio_init_struct);
}
void usart1_init(void)
{
USART1_GPIO_Init();
crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
// usart_init(USART1,CH343_BAUDRATE,USART_DATA_8BITS,USART_STOP_1_BIT); //波特率1M,8位数据位,1位停止位,无校验
// usart_parity_selection_config(USART1, USART_PARITY_EVEN);
usart_init(USART1,115200,USART_DATA_8BITS,USART_STOP_1_BIT); //波特率1M,8位数据位,1位停止位,无校验
usart_transmitter_enable(USART1, TRUE);
usart_receiver_enable(USART1, TRUE);
usart_dma_transmitter_enable(USART1, TRUE);
usart_dma_receiver_enable(USART1, TRUE);
// usart_hardware_flow_control_set(USART1, USART_HARDWARE_FLOW_NONE); // 硬件流控制
usart_interrupt_enable(USART1,USART_IDLE_INT,TRUE);
nvic_irq_enable(USART1_IRQn, 0, 0); // 开启这个才实际使能了中断
usart_enable(USART1, TRUE);
}
void usart3_init(void)
{
USART3_GPIO_Init();
crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
usart_parity_selection_config(USART3, USART_PARITY_EVEN);
usart_init(USART3,115200,USART_DATA_9BITS,USART_STOP_1_BIT); //波特率1M,8位数据位,1位停止位,无校验
// usart_init(USART3,CH343_BAUDRATE,USART_DATA_8BITS,USART_STOP_1_BIT);
usart_transmitter_enable(USART3, TRUE);
usart_receiver_enable(USART3, TRUE);
usart_dma_transmitter_enable(USART3, TRUE);
usart_dma_receiver_enable(USART3, TRUE);
// usart_hardware_flow_control_set(USART3, USART_HARDWARE_FLOW_NONE); // 硬件流控
// 开启空闲中断和错误中断
// usart_interrupt_enable(USART3,USART_IDLE_INT|USART_ERR_INT,TRUE);
usart_interrupt_enable(USART3,USART_IDLE_INT,TRUE);
nvic_irq_enable(USART3_IRQn, 0, 0); // 开启这个才实际使能了中断
usart_enable(USART3, TRUE);
}
/**
* @brief init dma1 channel1 for "usart1_rx"
* @param none
* @retval none
*/
void usart_dma1_channel1_init(void)
{
dma_init_type dma_init_struct;
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
dma_reset(DMA1_CHANNEL1);
dma_default_para_init(&dma_init_struct);
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_LOW;
dma_init_struct.loop_mode_enable = FALSE;
// dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
/* flexible function enable */
dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_UART1_RX);
}
/**
* @brief init dma1 channel2 for "usart1_tx"
* @param none
* @retval none
*/
void usart_dma1_channel2_init(void)
{
dma_init_type dma_init_struct;
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
dma_reset(DMA1_CHANNEL2);
dma_default_para_init(&dma_init_struct);
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_LOW;
dma_init_struct.loop_mode_enable = FALSE;
// dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL2, &dma_init_struct);
dma_interrupt_enable(DMA1_CHANNEL2, DMA_FDT_INT, TRUE);
nvic_irq_enable(DMA1_Channel2_IRQn, 0, 0);
dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_UART1_TX);
}
/**
* @brief init dma2 channel1 for "usart3_rx"
* @param none
* @retval none
*/
void usart_dma2_channel1_init(void)
{
dma_init_type dma_init_struct;
crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
dma_reset(DMA2_CHANNEL1);
dma_default_para_init(&dma_init_struct);
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_LOW;
dma_init_struct.loop_mode_enable = FALSE;
// dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA2_CHANNEL1, &dma_init_struct);
dma_flexible_config(DMA2, FLEX_CHANNEL1, DMA_FLEXIBLE_UART3_RX);
}
/**
* @brief init dma2 channel2 for "usart3_tx"
* @param none
* @retval none
*/
void usart_dma2_channel2_init(void)
{
dma_init_type dma_init_struct;
crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
dma_reset(DMA2_CHANNEL2);
dma_default_para_init(&dma_init_struct);
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_LOW;
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA2_CHANNEL2, &dma_init_struct);
dma_interrupt_enable(DMA2_CHANNEL2, DMA_FDT_INT, TRUE);
nvic_irq_enable(DMA2_Channel2_IRQn, 0, 0);
dma_flexible_config(DMA2, FLEX_CHANNEL2, DMA_FLEXIBLE_UART3_TX);
}
/**
* @brief config dma channel transfer parameter
* @param none
* @retval none
*/
void usart_dma_channel_config(dma_channel_type* dmax_channely, uint32_t peripheral_base_addr, uint32_t memory_base_addr, uint16_t buffer_size)
{
dmax_channely->dtcnt = buffer_size;
dmax_channely->paddr = peripheral_base_addr;
dmax_channely->maddr = memory_base_addr;
}
void USART_Config(void)
{
// usart1 接收
usart_dma1_channel1_init();
usart_dma_channel_config(DMA1_CHANNEL1, (uint32_t)&USART1->dt, usart1_dma_recv, USART_DMA_DATA_LEN);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
// usart1 send
usart_dma1_channel2_init();
usart_dma_channel_config(DMA1_CHANNEL2, (uint32_t)&USART1->dt, usart1_dma_send, USART_DMA_DATA_LEN);
dma_channel_enable(DMA1_CHANNEL2, FALSE);
// usart3 recv
usart_dma2_channel1_init();
usart_dma_channel_config(DMA2_CHANNEL1, (uint32_t)&USART3->dt, usart3_dma_recv, USART_DMA_DATA_LEN);
dma_channel_enable(DMA2_CHANNEL1, TRUE);
// usart3 send
usart_dma2_channel2_init();
usart_dma_channel_config(DMA2_CHANNEL2, (uint32_t)&USART3->dt, usart3_dma_send, USART_DMA_DATA_LEN);
dma_channel_enable(DMA2_CHANNEL2, FALSE); // 关闭传输
// 串口初始化
usart1_init();
usart3_init();
}
void DMA2_Channel2_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA2_FDT2_FLAG))
{
dma_channel_enable(DMA2_CHANNEL2, FALSE);
dma_flag_clear(DMA2_FDT2_FLAG);
}
}
void USART3_IRQHandler(void)
{
// 处理时间大概40us左右
if((0xAA == usart3_dma_recv[0])
&&(0xBB == usart3_dma_recv[usart3_dma_recv[1]])
){
in_queue(&recv_usart_fifo_ctrl,(uint8_t* )usart3_dma_recv);
}
usart_flag_clear (USART3, USART_IDLEF_FLAG);
usart13_dma_recv_clear(USART3);
// delay_ms(2);
usart13_dma_send_data(USART3,usart3_dma_recv,10);
}