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原创 LLVM学习笔记(13)

3.3.6.输出代码3.3.6.1. 枚举常量回到RegisterInfoEmitter::run(),现在可以调用RegisterInfoEmitter::runEnums()来向输出文件导出枚举常量了。这个输出文件被命名为TargetGenRegisterInfo.inc。以X86机器为例,产生的文件就是X86GenRegisterInfo.inc。首先,向这个文件输出的是若干枚举类...

2017-05-27 11:49:52 1406

原创 LLVM学习笔记(12)

3.3.5.信息的完善在RegisterInfoEmitter::run(),接下来执行CodeGenRegBank::computeDerivedInfo()方法。1802 void CodeGenRegBank::computeDerivedInfo() {1803 computeComposites();1804 computeSubRegLaneMasks(...

2017-05-12 11:45:58 1257

原创 LLVM学习笔记(11)

3.3.4.  CodeGenRegBankCodeGenTarget::getRegBank方法为CodeGenTarget实例返回一个CodeGenRegBank对象。213行的llvm::make_unique等同于C++11的std::unique_ptr。211      CodeGenRegBank &CodeGenTarget::getRegBank()const {

2017-05-05 11:46:33 1120

Introduction to Theory of Computation

This is a free textbook for an undergraduate course on the Theory of Computation, which we have been teaching at Carleton University since 2002.Until the 2011/2012 academic year, this course was offered as a second-year course (COMP 2805) and was compulsory for all Computer Science students. Starting with the 2012/2013 academic year, the course has been downgraded to a third-year optional course (COMP 3803).

2018-09-23

Survey on Instruction Selection

Instruction selection is one of three optimization problems involved in the code generator back-end of a compiler. The instruction selector is responsible of transforming an input program from its target-independent representation into a target-specific form by making best use of the available machine instructions. Hence instruction selection is a crucial part of efficient code generation.

2018-09-23

Towards a Compilation infrastructure for network processors

Modern network processors (NPs) typically resemble a highly-multithreaded multiprocessor-ona-chip, supporting a wide variety of mechanisms for on-chip storage and inter-task communication. NP applications are themselves composed of many threads that share memory and other resources,and synchronize and communicate frequently. In contrast, studies of new NP architectures and features are often performed by benchmarking a simulation model of the new NP using independent kernel programs that neither communicate nor share memory. In this paper we present a NP simulation infrastructure that (i) uses realistic NP applications that are multithreaded, share memory, synchronize, and communicate; and (ii) automatically maps these applications to a variety of NP architectures and features. We use our infrastructure to evaluate threading and scaling, on-chip storage and communication, and to suggest future techniques for automated compilation for NPs.

2018-09-23

Crafting a Compiler

Brief Contents 1 Introduction 1 2 A Simple Compiler 31 3 Scanning—Theory and Practice 57 4 Grammars and Parsing 113 5 Top-Down Parsing 143 6 Bottom-Up Parsing 179 7 Syntax-Directed Translation 235 8 Symbol Tables and Declaration Processing 279 9 Semantic Analysis 343 10 Intermediate Representations 391 11 Code Generation for a Virtual Machine 417 12 Runtime Support 445 13 Target Code Generation 489 14 Program Optimization 547

2018-09-01

How Debuggers Work

a total guide to debuggers: what they do, how they work, and how to use them to produce better programs

2018-09-01

Compiler Construction-20th

the essays collection of conference of Compiler Construction-20th

2018-09-01

Compiler Construction-19th

the essays collection of conference of Compiler Construction-19th

2018-09-01

Compiler Construction-17th

the essays collection of conference of Compiler Construction-17th

2018-09-01

Compiler Construction-16th

the essays collection of conference of Compiler Construction-16th

2018-09-01

Compiler Construction-5th

the essays collection of conference of Compiler Construction-5th

2018-09-01

Construction and Evolution of Code Generator

It describes the Construction and Evolution of Code Generator

2018-09-01

Compiler Construction-11th

the essays collection of conference Compiler Construction-11th

2018-09-01

The compiler design handbook

The compiler design handbook, which describes the design practice of compiler

2018-09-01

Data_Flow_Analysis_Theory_And_Practice(Bookos.org)

Data Flow Analysis Theory And Practice for compiler development

2018-09-01

The Compiler Design Handbook Optimizations and machine code generation

The Compiler Design Handbook Optimizations and machine code generation

2018-09-01

C++_Coding_Standards_101_Rule

C++ Coding Standards 101 Rule, Andrei Alexandrescu

2018-08-24

instruction scheduling for instruction level parallel processor

instruction scheduling for instruction level parallel processor

2018-07-16

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