# 1 "cpu_init.S"
# 1 "/home/gong/soft/u-boot-mini6410/cpu/s3c64xx/s3c6410//"
# 1 "<built-in>"
# 1 "<command-line>"
# 1 "cpu_init.S"
# 1 "/home/gong/soft/u-boot-mini6410/include/config.h" 1
# 1 "/home/gong/soft/u-boot-mini6410/include/configs/mini6410.h" 1
# 163 "/home/gong/soft/u-boot-mini6410/include/configs/mini6410.h"
# 1 "/home/gong/soft/u-boot-mini6410/include/cmd_confdefs.h" 1
# 164 "/home/gong/soft/u-boot-mini6410/include/configs/mini6410.h" 2
# 4 "/home/gong/soft/u-boot-mini6410/include/config.h" 2
# 2 "cpu_init.S" 2
# 1 "/home/gong/soft/u-boot-mini6410/include/s3c6410.h" 1
# 39 "/home/gong/soft/u-boot-mini6410/include/s3c6410.h"
# 1 "/home/gong/soft/u-boot-mini6410/include/asm/hardware.h" 1
# 16 "/home/gong/soft/u-boot-mini6410/include/asm/hardware.h"
# 1 "/home/gong/soft/u-boot-mini6410/include/asm/arch/hardware.h" 1
# 1 "/home/gong/soft/u-boot-mini6410/include/asm/sizes.h" 1
# 5 "/home/gong/soft/u-boot-mini6410/include/asm/arch/hardware.h" 2
# 17 "/home/gong/soft/u-boot-mini6410/include/asm/hardware.h" 2
# 40 "/home/gong/soft/u-boot-mini6410/include/s3c6410.h" 2
# 3 "cpu_init.S" 2
.globl mem_ctrl_asm_init
mem_ctrl_asm_init:
ldr r0, =0x7e00f120 @Memory sussystem address 0x7e00f120
mov r1, #0xd @ Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1
str r1, [r0]
ldr r0, =0x7e001000 @DMC1 base address 0x7e001000
ldr r1, =0x04
str r1, [r0, #(0x04)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 7800) - 1) / 1000000)
str r1, [r0, #(0x10)]
ldr r1, =(3<<1)
str r1, [r0, #(0x14)]
ldr r1, =1
str r1, [r0, #(0x18)]
ldr r1, =2
str r1, [r0, #(0x1C)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 45) - 1) / 1000000 + 1)
str r1, [r0, #(0x20)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 68) - 1) / 1000000 + 1)
str r1, [r0, #(0x24)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 23) - 1) / 1000000 + 1)
ldr r2, =(((((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 23) - 1) / 1000000 + 1) - 3) << 3)
orr r1, r1, r2
str r1, [r0, #(0x28)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 80) - 1) / 1000000 + 1)
ldr r2, =(((((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 80) - 1) / 1000000 + 1) - 3) << 5)
orr r1, r1, r2
str r1, [r0, #(0x2C)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 23) - 1) / 1000000 + 1)
ldr r2, =(((((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 23) - 1) / 1000000 + 1) - 3) << 3)
orr r1, r1, r2
str r1, [r0, #(0x30)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 15) - 1) / 1000000 + 1)
str r1, [r0, #(0x34)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 15) - 1) / 1000000 + 1)
str r1, [r0, #(0x38)]
ldr r1, =2
str r1, [r0, #(0x3C)]
ldr r1, =2
str r1, [r0, #(0x40)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 120) - 1) / 1000000 + 1)
str r1, [r0, #(0x44)]
ldr r1, =(((((12000000/(3<<1)*266)/(1 +1)/(1 +1)) / 1000 * 120) - 1) / 1000000 + 1)
str r1, [r0, #(0x48)]
ldr r1, =((1<<30) | (2<<15) | (3<<3) | (2<<0))
str r1, [r0, #(0x0C)]
ldr r1, =0xB41
str r1, [r0, #(0x4C)]
ldr r1, =0x150F0
str r1, [r0, #(0x200)]
ldr r1, =0x0
str r1, [r0, #(0x304)]
@DMC0 DDR Chip 0 configuration direct command reg
ldr r1, =0x0c0000
str r1, [r0, #(0x08)]
@Precharge All
ldr r1, =0x000000
str r1, [r0, #(0x08)]
@Auto Refresh 2 time
ldr r1, =0x040000
str r1, [r0, #(0x08)]
str r1, [r0, #(0x08)]
@MRS
ldr r1, =0x0a0000
str r1, [r0, #(0x08)]
@Mode Reg
ldr r1, =0x080032
str r1, [r0, #(0x08)]
# 126 "cpu_init.S"
@Enable DMC1
mov r1, #0x0
str r1, [r0, #(0x04)]
check_dmc1_ready:
ldr r1, [r0, #(0x00)]
mov r2, #0x3
and r1, r1, r2
cmp r1, #0x1
bne check_dmc1_ready
nop
mov pc, lr
.globl cleanDCache
cleanDCache:
mrc p15, 0, pc, c7, c10, 3
bne cleanDCache
mov pc, lr
.globl cleanFlushDCache
cleanFlushDCache:
mrc p15, 0, pc, c7, c14, 3
bne cleanFlushDCache
mov pc, lr
.globl cleanFlushCache
cleanFlushCache:
mrc p15, 0, pc, c7, c14, 3
bne cleanFlushCache
mcr p15, 0, r0, c7, c5, 0
mov pc, lr
.ltorg
S3C6410 ddr init
最新推荐文章于 2022-06-28 16:22:52 发布