概述
本文主要描述了在Qemu平台中，如何添加STM32F103的Flash控制器模拟代码。
参考资料
STM32F1XX TRM手册，手册编号：RM0008
添加步骤
1、在hw/arm/Kconfig文件中添加STM32F1XX_FLASH，如下所示:
+号部分为新增加内容
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 429fed24..ac501b53 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -416,6 +416,7 @@ config STM32F103_SOC
select STM32F1XX_RCC
select STM32F1XX_EXTI
select STM32F1XX_PWR
+ select STM32F1XX_FLASH
2、在include/hw/arm/stm32f103_soc.h文件中添加
+号部分为新增加内容
diff --git a/include/hw/arm/stm32f103_soc.h b/include/hw/arm/stm32f103_soc.h
index 942f3940..95295bdd 100644
--- a/include/hw/arm/stm32f103_soc.h
+++ b/include/hw/arm/stm32f103_soc.h
@@ -26,10 +26,12 @@
#include "hw/misc/stm32f1xx_rcc.h"
#include "hw/misc/stm32f1xx_exti.h"
#include "hw/misc/stm32f1xx_pwr.h"
+#include "hw/misc/stm32f1xx_flash.h"
#define RCC_BASE_ADDR 0x40021000
#define EXTI_BASE_ADDR 0x40010400
#define PWR_BASE_ADDR 0x40007000
+#define FLASH_BASE_ADDR 0x40022000
#define TYPE_STM32F103_SOC "stm32f103-soc"
#define STM32F103_SOC(obj) \
@@ -47,6 +49,7 @@ typedef struct STM32F103State {
STM32F1XXRccState rcc;
STM32F1xxExtiState exti;
STM32F1XXPowerState pwr;
+ STM32F1XXFlashState flash;
} STM32F103State;
3、在hw/arm/stm32f103_soc.c文件中添加如下代码片段
+号部分为新增加内容
diff --git a/hw/arm/stm32f103_soc.c b/hw/arm/stm32f103_soc.c
index 18e99216..655fda4f 100644
--- a/hw/arm/stm32f103_soc.c
+++ b/hw/arm/stm32f103_soc.c
@@ -54,6 +54,9 @@ static void stm32f103_soc_initfn(Object *obj)
sysbus_init_child_obj(obj, "pwr", &s->pwr, sizeof(s->pwr),
TYPE_STM32F1XX_POWER);
+
+ sysbus_init_child_obj(obj, "flash", &s->flash, sizeof(s->flash),
+ TYPE_STM32F1XX_FLASH);
}
static void stm32f103_soc_realize(DeviceState *dev_soc, Error **errp)
@@ -106,6 +109,15 @@ static void stm32f103_soc_realize(DeviceState *dev_soc, Error **errp)
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, PWR_BASE_ADDR);
+ /* Flash Controller */
+ dev = DEVICE(&s->flash);
+ object_property_set_bool(OBJECT(&s->flash), true, "realized", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
+ busdev = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(busdev, 0, FLASH_BASE_ADDR);
}
static Property stm32f103_soc_properties[] = {4.在hw/misc/Kconfig中添加
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 804a1655..af2c8f8b 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -110,6 +110,9 @@ config STM32F1XX_EXTI
config STM32F1XX_PWR
bool
+config STM32F1XX_FLASH
+ bool
+
config STM32F2XX_SYSCFG
bool5.在hw/misc/Makefile.objs中添加
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 5b227502..ec738e27 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -68,6 +68,7 @@ common-obj-$(CONFIG_STM32F2XX_SYSCFG) += stm32f2xx_syscfg.o
common-obj-$(CONFIG_STM32F1XX_RCC) += stm32f1xx_rcc.o
common-obj-$(CONFIG_STM32F1XX_EXTI) += stm32f1xx_exti.o
common-obj-$(CONFIG_STM32F1XX_PWR) += stm32f1xx_pwr.o
+common-obj-$(CONFIG_STM32F1XX_FLASH) += stm32f1xx_flash.o
obj-$(CONFIG_STM32F4XX_RCC) += stm32f4xx_rcc.o
obj-$(CONFIG_STM32F4XX_PWR) += stm32f4xx_pwr.o
obj-$(CONFIG_STM32F4XX_FLASH) += stm32f4xx_flash.o6.在hw/misc/创建新文件hw/misc/stm32f1xx_flash.c
new file mode 100644
index 00000000..1cf9e688
--- /dev/null
+++ b/hw/misc/stm32f1xx_flash.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2025 liang yan <yanl1229@163.com>
+ *
+ * STM32F1XX Flash interface
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
+ */
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/log.h"
+#include "hw/misc/stm32f1xx_flash.h"
+#include "hw/irq.h"
+#include "hw/qdev-properties.h"
+#include "qemu/module.h"
+#include "migration/vmstate.h"
+#include "qemu/module.h"
+
+#ifndef STM_FLASH_ERR_DEBUG
+#define STM_FLASH_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+ if (STM_FLASH_ERR_DEBUG >= lvl) { \
+ qemu_log("%s: " fmt, __func__, ## args); \
+ } \
+} while (0);
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f1xx_flash_reset(DeviceState *dev)
+{
+ STM32F1XXFlashState *s = STM32F1XX_FLASH(dev);
+
+ s->flash_acr = 0x00000030;
+ s->flash_keyr = 0x00000000;
+ s->flash_optkeyr = 0x00000000;
+ s->flash_sr = 0x00000000;
+ s->flash_cr = 0x00000000;
+ s->flash_ar = 0x0fffaaed;
+ s->flash_obr = 0x0fff0000;
+ s->flash_wrpr = 0x0fff0000;
+}
+
+static uint64_t stm32f1xx_flash_read(void *opaque, hwaddr addr,
+ unsigned int size)
+{
+ STM32F1XXFlashState *s = opaque;
+ uint64_t retvalue = 0;
+
+ DB_PRINT("Address: 0x%" HWADDR_PRIx "\n", addr);
+ switch(addr) {
+ case STM_FLASH_ACR:
+ retvalue = s->flash_acr;
+ break;
+ case STM_FLASH_KEYR:
+ retvalue = s->flash_keyr;
+ break;
+ case STM_FLASH_OPTKEYR:
+ retvalue = s->flash_optkeyr;
+ break;
+ case STM_FLASH_SR:
+ retvalue = s->flash_sr;
+ break;
+ case STM_FLASH_CR:
+ retvalue = s->flash_cr;
+ break;
+ case STM_FLASH_AR:
+ retvalue = s->flash_ar;
+ break;
+ case STM_FLASH_OBR:
+ retvalue = s->flash_obr;
+ break;
+ case STM_FLASH_WRPR:
+ retvalue = s->flash_wrpr;
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, addr);
+ retvalue = 0;
+ break;
+ }
+ return retvalue;
+}
+
+static void stm32f1xx_flash_write(void *opaque, hwaddr addr,
+ uint64_t val64, unsigned int size)
+{
+ STM32F1XXFlashState *s = opaque;
+ uint32_t value = val64;
+
+ DB_PRINT("Address: 0x%" HWADDR_PRIx ", Value: 0x%x\n", addr, value);
+ switch(addr) {
+ case STM_FLASH_ACR:
+ s->flash_acr |= value;
+ break;
+ case STM_FLASH_KEYR:
+ s->flash_keyr |= value;
+ break;
+ case STM_FLASH_OPTKEYR:
+ s->flash_optkeyr |= value;
+ break;
+ case STM_FLASH_SR:
+ s->flash_sr |= value;
+ break;
+ case STM_FLASH_CR:
+ s->flash_cr |= value;
+ break;
+ case STM_FLASH_AR:
+ s->flash_ar |= value;
+ break;
+ case STM_FLASH_OBR:
+ s->flash_obr |= value;
+ break;
+ case STM_FLASH_WRPR:
+ s->flash_wrpr |= value;
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, addr);
+ }
+}
+
+static const MemoryRegionOps stm32f1xx_flash_ops = {
+ .read = stm32f1xx_flash_read,
+ .write = stm32f1xx_flash_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static const VMStateDescription vmstate_stm32f1xx_flash = {
+ .name = TYPE_STM32F1XX_FLASH,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(flash_acr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_keyr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_optkeyr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_sr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_cr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_obr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_obr, STM32F1XXFlashState),
+ VMSTATE_UINT32(flash_wrpr, STM32F1XXFlashState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void stm32f1xx_flash_init(Object *obj)
+{
+ STM32F1XXFlashState *s = STM32F1XX_FLASH(obj);
+
+ memory_region_init_io(&s->mmio, obj, &stm32f1xx_flash_ops, s,
+ TYPE_STM32F1XX_FLASH, 0x400);
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
+}
+
+static void stm32f1xx_flash_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->reset = stm32f1xx_flash_reset;
+ dc->vmsd = &vmstate_stm32f1xx_flash;
+}
+
+static const TypeInfo stm32f1xx_flash_info = {
+ .name = TYPE_STM32F1XX_FLASH,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(STM32F1XXFlashState),
+ .instance_init = stm32f1xx_flash_init,
+ .class_init = stm32f1xx_flash_class_init,
+};
+
+static void stm32f1xx_flash_register_types(void)
+{
+ type_register_static(&stm32f1xx_flash_info);
+}
+
+type_init(stm32f1xx_flash_register_types)7.在include/hw/misc/创建stm32f1xx_flash.h文件
+/*
+ * Copyright (c) 2025 liang yan <yanl1229@163.com>
+ *
+ * STM32F1xx Flash interface
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
+ */
+#ifndef STM32F1XX_FLASH_H
+#define STM32F1XX_FLASH_H
+
+#include "hw/sysbus.h"
+
+#define STM_FLASH_ACR 0x00
+#define STM_FLASH_KEYR 0x04
+#define STM_FLASH_OPTKEYR 0x08
+#define STM_FLASH_SR 0x0c
+#define STM_FLASH_CR 0x10
+#define STM_FLASH_AR 0x14
+#define STM_FLASH_OBR 0x18
+#define STM_FLASH_WRPR 0x20
+
+#define PWR_CR_DBP (1 << 8)
+
+#define TYPE_STM32F1XX_FLASH "stm32f1xx-flash"
+#define STM32F1XX_FLASH(obj) \
+ OBJECT_CHECK(STM32F1XXFlashState, (obj), TYPE_STM32F1XX_FLASH)
+
+typedef struct {
+ /* <private> */
+ SysBusDevice parent_obj;
+
+ /* <public> */
+ MemoryRegion mmio;
+
+ uint32_t flash_acr;
+ uint32_t flash_keyr;
+ uint32_t flash_optkeyr;
+ uint32_t flash_sr;
+ uint32_t flash_cr;
+ uint32_t flash_ar;
+ uint32_t flash_obr;
+ uint32_t flash_wrpr;
+
+} STM32F1XXFlashState;
+
+#endif
总结
本文描述了如何在qemu中添加stm32f103平台上FLASH控制器实现步骤。
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