《Kernel中 解析HDMI EDID信息》

最新推荐文章于 2022-09-09 13:42:58 发布
最新推荐文章于 2022-09-09 13:42:58 发布
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分类专栏： # 【 Linux Kernel 】
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本文链接：https://blog.csdn.net/yexiangCSDN/article/details/100040429
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#define EDID_DEBUG(fmt, args...) printk(fmt, ## args)

#define         EDID_LENGTH                     0x80
#define         EDID_HEADER                     0x00                                                                      
#define         EDID_HEADER_END     0x07



#define UNKNOWN_DESCRIPTOR      						-1
#define DETAILED_TIMING_BLOCK   						-2
#define DETAILED_TIMING_DESCRIPTIONS_START         		0x36
#define DETAILED_TIMING_DESCRIPTION_SIZE        		18
#define TOTAL_NUM_DETAILED_TIMING_DESCRIPTIONS          4
#define MONITOR_LIMITS	    							0xFD
#define MONITOR_NAME	    							0xFC

#define AUDIO_TYPE 				0
#define VIDEO_TYPE				1

#define MAX_EDID_BLOCKS_SUPPORT		8
#define EDID_BLOCK_SIZE				128
#define HDMI_FLAG_VIDEO_UPDATE		0x00000001
#define HDMI2USR_EDID_READY_MSG		0x00000001
#define HDMI2USR_HOTPLUG_IN_MSG		0x00000002
#define HDMI2USR_HOTPLUG_OUT_MSG	0x00000004
#define HDMI2USR_CEC_MSG			0x00000008
#define HDMI2USR_HDCP_MSG			0x00000010

typedef struct VENDOR_PRODUCT_BLOCK
{
    unsigned char manufacturer_name[4];
    unsigned short product_id; 
    unsigned int serial_number; 
    unsigned char week_manufacturer;  
    unsigned short year_manufacturer;
    struct VENDOR_PRODUCT_BLOCK * next;	
}VENDOR_PRODUCT_BLOCK_t;

typedef struct DETAILED_TIMING_DESCRIPTOR
{
	unsigned short pixel_clock_div_10000;
	unsigned short h_active;
	unsigned short h_blanking;
	unsigned short v_active;
	unsigned short v_blanking;
	unsigned short h_sync_offset;
	unsigned short h_sync_pulse_w;
	unsigned char v_sync_offset;
	unsigned char v_sync_pulse_w;
	unsigned short h_image_size;
	unsigned short v_image_size;
	unsigned char h_border;
	unsigned char v_border;
	unsigned char interlaced;//0-- non-interlaced; 1 -- interlaced
	struct DETAILED_TIMING_DESCRIPTOR * next;	
}DETAILED_TIMING_DESCRIPTOR_t;

static struct DETAILED_TIMING_DESCRIPTOR	*detailed_timing_descriptor = NULL;



void parse_timing_description(unsigned char* dtd)
{
        DETAILED_TIMING_DESCRIPTOR_t  *detailed_descriptor = detailed_timing_descriptor;
        DETAILED_TIMING_DESCRIPTOR_t  *tmp=NULL;

        while (detailed_descriptor!=NULL)
        {
                tmp=detailed_descriptor;
                detailed_descriptor=detailed_descriptor->next;
        detailed_descriptor=(DETAILED_TIMING_DESCRIPTOR_t *)kmalloc(sizeof(DETAILED_TIMING_DESCRIPTOR_t),GFP_KERNEL);

        if (NULL==detailed_descriptor)
                return ;
        memset(detailed_descriptor,0,(sizeof(DETAILED_TIMING_DESCRIPTOR_t)));

        detailed_descriptor->next = NULL;

        if (NULL!=tmp)
                tmp->next=detailed_descriptor;
        else
                detailed_timing_descriptor = detailed_descriptor;

        detailed_descriptor->pixel_clock_div_10000 = (dtd[1]<<8)|(dtd[0]);
        detailed_descriptor->h_active           = (unsigned short) (( ((dtd[4]&0xF0) << 4) | dtd[2]) ); // 12 bits
        detailed_descriptor->h_blanking         = (unsigned short) (( ((dtd[4]&0x0F) << 8) | dtd[3]) ); // 12 bits
        detailed_descriptor->v_active           = (unsigned short) (( ((dtd[7]&0xF0) << 4) | dtd[5]) ); // 12 bits
        detailed_descriptor->v_blanking         = (unsigned short) (( ((dtd[7]&0x0F) << 8) | dtd[6]) ); // 12 bits      
        detailed_descriptor->h_sync_offset      = (unsigned short) (( ((dtd[11]&0xC0) << 2) | dtd[8]) ); // 10 bits
        detailed_descriptor->h_sync_pulse_w     = (unsigned short) (( ((dtd[11]&0x30) << 4) | dtd[9]) ); // 10 bits     
        detailed_descriptor->v_sync_offset      =  (unsigned char) ((dtd[11]&0x0C)<<2) | ((dtd[10]&0xF0) >>4);  // 6 bits
        detailed_descriptor->v_image_size       = (unsigned short) (( ((dtd[14]&0x0F) << 8) | dtd[13]) ); // 12 bits    
        detailed_descriptor->h_border = dtd[15];        
        detailed_descriptor->v_border = dtd[16];        
        detailed_descriptor->interlaced = (dtd[17]>>7);

        EDID_DEBUG( "\tHorizontal active (pixels): %d\n", detailed_descriptor->h_active);       
        EDID_DEBUG( "\tHorizontal blanking (pixels):  %d\n", detailed_descriptor->h_blanking);
        EDID_DEBUG( "\tVertical active (lines):  %d\n", detailed_descriptor->v_active); 
        EDID_DEBUG( "\tVertical blanking (lines):  %d\n", detailed_descriptor->v_blanking);
        EDID_DEBUG( "\tHorizontal Sync offset (pixels):  %d\n", detailed_descriptor->h_sync_offset);    
        EDID_DEBUG( "\tHorizontal Sync pulse width (pixels):  %d\n", detailed_descriptor->h_sync_pulse_w);      
        EDID_DEBUG( "\tVertical Sync offset (lines):  %d\n", detailed_descriptor->v_sync_offset);       
        EDID_DEBUG( "\tVertical Sync pulse width (lines):  %d\n", detailed_descriptor->v_sync_pulse_w);
        EDID_DEBUG("\tHorizontal image size (mm): %d\n",detailed_descriptor->h_image_size);
        EDID_DEBUG("\tVertical image size (mm): %d\n",detailed_descriptor->v_image_size);
        EDID_DEBUG("\tScanning mode: %s\n", (detailed_descriptor->interlaced) ? "Interlaced":"Non-interlaced"); 
        EDID_DEBUG("\tStereo: ");       
        switch(((dtd[17] & 0x60)>>4)|(dtd[17] & 0x01))
        {
                case 0:
                case 1:         EDID_DEBUG( "Normal display, no stereo.\n");                                                            break;
                case 2:         EDID_DEBUG( "Field sequential stereo, right image when stereo sync. = 1\n");    break;
                case 3:         EDID_DEBUG( "Field sequential stereo, left image when stereo sync. = 1y\n");    break;          
                case 4:         EDID_DEBUG( "2-way interleaved stereo, right image on even lines\n");                   break;
                case 5:         EDID_DEBUG( "2-way interleaved stereo, left image on even lines\n");                    break;
                case 6:         EDID_DEBUG( "4-way interleaved stereo\n");                                                              break;
        }
        EDID_DEBUG("\tSync mode: ");    
        switch((dtd[17] & 0x18)>>3)
        {
                case 0:
                        EDID_DEBUG( "Analog composite\n");                                                              
                        break;
                case 1:
                        EDID_DEBUG( "Bipolar analog composite\n");                                                              
                        break;
                case 2:
                        EDID_DEBUG( "Digital composite\n");                                                             
                        break;
                case 3:
                        EDID_DEBUG( "Digital separate, ");      
                        EDID_DEBUG( "VSYNC polarity %c, ", (dtd[17] & 0x04) ? '+':'-'); 
                        EDID_DEBUG( "HSYNC polarity %c\n", (dtd[17] & 0x02) ? '+':'-');
                        break;                  
        }
        
        return;
}


int hdmi_edid_parse_std(unsigned char *edid)
{
	unsigned int i, j;
	unsigned char* block;
	unsigned char edid_v1_header[] = {0x00, 0xff, 0xff, 0xff,0xff, 0xff, 0xff, 0x00};	
//	char monitor_alt_name[100];
	unsigned char checksum = 0;
	unsigned int detail_timing_block_type;
//	int ret = 0;
	bool edid_head_same;

    VENDOR_PRODUCT_BLOCK_t *vendor_product_id = vendor_product_block;
    vendor_product_id = (VENDOR_PRODUCT_BLOCK_t *)kmalloc(sizeof(VENDOR_PRODUCT_BLOCK_t), GFP_KERNEL);
    if(NULL == vendor_product_id)
        return 0;
    memset(vendor_product_id, 0, (sizeof(VENDOR_PRODUCT_BLOCK_t)));
    vendor_product_block = vendor_product_id;

	for( i = 0; i < EDID_LENGTH; i++)
		checksum += edid[ i ];

	if(memcmp( edid+EDID_HEADER, edid_v1_header, EDID_HEADER_END+1 ) == 0)
		edid_head_same = true;
	else
		edid_head_same = false;
		
	if(checksum != 0)
	{
		if(edid_head_same)
		{
			EDID_DEBUG( "%s in:EDID checksum failed - data is corrupt. Continuing anyway.\n" ,__FUNCTION__);
			return 0;
		}
		
		checksum = 0;
		for(i=0; i<8;i++)
			checksum += edid_v1_header[i];

		for(i=8; i<EDID_LENGTH;i++)
			checksum += edid[ i ];
			
		if(checksum != 0)
		{
			EDID_DEBUG( "%s in:EDID checksum failed - data is corrupt. Continuing anyway.\n",__FUNCTION__);
			return 0;
		}
  	}
	else if(!edid_head_same )
	{
		EDID_DEBUG( "%s in:8 byte pattern header (0x00, 0xff, 0xff, 0xff,0xff, 0xff, 0xff, 0x0) not match!!\n",__FUNCTION__);
		return 0;
	}

    EDID_DEBUG("\nVendor and Product ID\n");	
	EDID_DEBUG("\tManufacturer Name: %c%c%c\n", (edid[0x08] >>2)+'A'-1, (((edid[0x08] <<3) | (edid[0x09] >>5)) & 0x1f)+'A'-1, (edid[0x09] & 0x1f)+'A'-1);	
	EDID_DEBUG("\tProduct Code: %d\n", edid[0x0B]<<8|edid[0x0A]);
	EDID_DEBUG("\tSerial Number: %d\n", edid[0x0F]<<24|edid[0x0E]<<16|edid[0x0D]<<8|edid[0x0C]);	
	EDID_DEBUG("\tWeek of Manufacture: %d\n", edid[0x10]);	
	EDID_DEBUG("\tYear of Manufacture: %d\n", edid[0x11]+1990);	
    vendor_product_id->manufacturer_name[0] = (edid[0x08] >>2)+'A'-1;
    vendor_product_id->manufacturer_name[1] = (((edid[0x08] <<3) |(edid[0x09] >>5)) & 0x1f)+'A'-1;
    vendor_product_id->manufacturer_name[2] = (edid[0x09] & 0x1f)+'A'-1;
    vendor_product_id->product_id = edid[0x0B]<<8|edid[0x0A];
    vendor_product_id->serial_number = edid[0x0F]<<24|edid[0x0E]<<16|edid[0x0D]<<8|edid[0x0C];
    vendor_product_id->week_manufacturer = edid[0x10];
    vendor_product_id->year_manufacturer = (edid[0x11]+1990);
    EDID_DEBUG("\nEDID Structure\n");	
	EDID_DEBUG( "\tVersion no.: %d\n" , edid[0x12]);
	EDID_DEBUG( "\tRevision no.: %d\n", edid[0x13]);
	
    EDID_DEBUG("\nBasic Display Parameters and Features\n");
	EDID_DEBUG( "\tVideo Input Signal Type: %s\n" , (edid[0x14]>>7) ? "Digital": "Analog");
	if(edid[0x14]>>7) 
	{
		// Digital
		EDID_DEBUG("\tVESA DFP 1.X default: %s\n", (edid[0x14]&0x01) ? "Compatible": "Not Compatible");	
	}
	
	EDID_DEBUG( "\tMax Horz Size (in cm): %d\n", edid[0x15]);
	EDID_DEBUG( "\tMax Vert Size (in cm): %d\n", edid[0x16]);
	if(edid[0x17] == 0xFF)
		EDID_DEBUG( "\tGamma Value: Not defined\n");
	else
		EDID_DEBUG( "\tGamma Value: %d.%d\n", (edid[0x17]+100)/100, (edid[0x17]+100)%100);
	EDID_DEBUG( "\tFeature Support (DPMS)\n");
	EDID_DEBUG( "\t\t Standby Mode: %s \n", (edid[0x18]&0x80) ? "Supported": "Not Supported");
	EDID_DEBUG( "\t\t Suspend Mode: %s \n", (edid[0x18]&0x40) ? "Supported": "Not Supported");
	EDID_DEBUG( "\t\t Active Off Mode: %s \n", (edid[0x18]&0x20) ? "Supported": "Not Supported");
	EDID_DEBUG( "\t\t Display Type: ");
	switch((edid[0x18]&0x18)>>3)
	{
		case 0:		EDID_DEBUG( "Monochrome display\n");		break;
		case 1:		EDID_DEBUG( "RGB color display\n");			break;
		case 2:		EDID_DEBUG( "Non-RGB multicolor display\n");	break;
		case 3:		EDID_DEBUG( "Undefined display\n");			break;			
	}
	EDID_DEBUG( "\t\t Color Space: %s \n", (edid[0x18]&0x04) ? "sRGB": "Alternate");
	EDID_DEBUG( "\t\t Preferred Timing: %s \n", (edid[0x18]&0x02) ? "1st DTD": "Non indicated");
	EDID_DEBUG( "\t\t GTF Timing: %s \n", (edid[0x18]&0x01) ? "Supported": "Not Supported");


	EDID_DEBUG("\nPhosphor or Filter Chromaticity\n");	
	EDID_DEBUG( "\tRed_x: 0.%.3d\n" 	,((edid[0x1B]<<2)  | ((edid[0x19]>>6)&0x03))*1000/1024);	
	EDID_DEBUG( "\tRed_y: 0.%.3d\n" 	,((edid[0x1C]<<2)  | ((edid[0x19]>>4)&0x03))*1000/1024);
	EDID_DEBUG( "\tGreen_x: 0.%.3d\n",((edid[0x1D]<<2)  | ((edid[0x19]>>2)&0x03))*1000/1024);
	EDID_DEBUG( "\tGreen_y: 0.%.3d\n",((edid[0x1E]<<2) | (edid[0x19]&0x03))*1000/1024);
	EDID_DEBUG( "\tBlue_x: 0.%.3d\n" 	,((edid[0x1F]<<2)  | ((edid[0x1A]>>6)&0x03))*1000/1024);
	EDID_DEBUG( "\tBlue_y: 0.%.3d\n" 	,((edid[0x20]<<2)  | ((edid[0x1A]>>4)&0x03))*1000/1024);
	EDID_DEBUG( "\tWhite_x: 0.%.3d\n" ,((edid[0x21]<<2)  | ((edid[0x1A]>>2)&0x03))*1000/1024);
	EDID_DEBUG( "\tWhite_y: 0.%.3d\n" ,((edid[0x22]<<2)  | (edid[0x1A]&0x03))*1000/1024);

	EDID_DEBUG("\nEstablished Timings\n");	
	EDID_DEBUG( "\tEstablished Timings I \n");
	if(edid[0x23]&0x80)	EDID_DEBUG( "\t\t 720 x 400 @ 70Hz IBM, VGA\n");
	if(edid[0x23]&0x40)	EDID_DEBUG( "\t\t 720 x 400 @ 88Hz IBM, XGA2\n");
	if(edid[0x23]&0x20)	EDID_DEBUG( "\t\t 640 x 480 @ 60Hz IBM, VGA\n");
	if(edid[0x23]&0x10)	EDID_DEBUG( "\t\t 640 x 480 @ 67Hz Apple, Mac II\n");
	if(edid[0x23]&0x08)	EDID_DEBUG( "\t\t 640 x 480 @ 72Hz VESA\n");
	if(edid[0x23]&0x04)	EDID_DEBUG( "\t\t 640 x 480 @ 75Hz VESA\n");
	if(edid[0x23]&0x02)	EDID_DEBUG( "\t\t 800 x 600 @ 56Hz VESA\n");
	if(edid[0x23]&0x01)	EDID_DEBUG( "\t\t 800 x 600 @ 60Hz VESA\n");	
	if(edid[0x23]== 0x00)	EDID_DEBUG( "\t\t None\n");	
	EDID_DEBUG( "\tEstablished Timings II \n");
	if(edid[0x24]&0x80)	EDID_DEBUG( "\t\t 800 x 600 @ 72Hz VESA\n");
	if(edid[0x24]&0x40)	EDID_DEBUG( "\t\t 800 x 600 @ 75Hz VESA\n");
	if(edid[0x24]&0x20)	EDID_DEBUG( "\t\t 832 x 624 @ 75Hz Apple, Mac II\n");
	if(edid[0x24]&0x10)	EDID_DEBUG( "\t\t 1024 x 768 @ 87Hz IBM\n");
	if(edid[0x24]&0x08)	EDID_DEBUG( "\t\t 1024 x 768 @ 60Hz VESA\n");
	if(edid[0x24]&0x04)	EDID_DEBUG( "\t\t 1024 x 768 @ 70Hz VESA\n");
	if(edid[0x24]&0x02)	EDID_DEBUG( "\t\t 1024 x 768 @ 75Hz VESA\n");
	if(edid[0x24]&0x01)	EDID_DEBUG( "\t\t 1280 x 1024 @ 75Hz VESA\n");	
	if(edid[0x24]== 0x00)	EDID_DEBUG( "\t\t None\n");		
	EDID_DEBUG( "\tManufacturer's Timings\n");
	if(edid[0x25]&0x80)	EDID_DEBUG( "\t\t 1152 x 870 @ 75Hz Apple, Mac II\n");
	else					EDID_DEBUG( "\t\t None\n");	
		
	EDID_DEBUG("\nStandard Timings\n");	
  	for(i = 0; i < 8; i++)
  	{
		EDID_DEBUG( "\tStandard Timing %d\n", i+1);	
		if(edid[0x26+i*2] == 0x01 && edid[0x26+i*2+1] == 0x01 )
			EDID_DEBUG( "\t\t Unused\n");	
		else
		{
			EDID_DEBUG( "\t\t Horizontal active pixels: %d\n", (edid[0x26+i*2]+31)*8);			
			EDID_DEBUG( "\t\t Image Aspect ratio: ");	
			switch((edid[0x26+i*2+1]&0xC0)>>6)
			{
				case 0:		EDID_DEBUG( "16:10\n");			break;
				case 1:		EDID_DEBUG( "4:3\n");			break;
				case 2:		EDID_DEBUG( "5:4\n");			break;
				case 3:		EDID_DEBUG( "16:9\n");			break;			
		}	
			EDID_DEBUG( "\t\t Refresh Rate: %d Hz\n", (edid[0x26+i*2+1]&0x3F)+60);			
		}
	}
	
  	block = edid + DETAILED_TIMING_DESCRIPTIONS_START;

	for( i = 0; i < TOTAL_NUM_DETAILED_TIMING_DESCRIPTIONS; i++, block += DETAILED_TIMING_DESCRIPTION_SIZE)
	{

		if(!memcmp(edid_v1_descriptor_flag, block, 2 ) )
		{
      			/* descriptor */
			if(block[2] != 0)
				detail_timing_block_type = UNKNOWN_DESCRIPTOR;
			else
				detail_timing_block_type = block[3];
		}
		else
			detail_timing_block_type = DETAILED_TIMING_BLOCK; /* detailed timing block */

		
		EDID_DEBUG("\nDetailed Timing Descriptor %d\n", i+1);
		switch(detail_timing_block_type)
		{
			case DETAILED_TIMING_BLOCK:
			 	parse_timing_description(block);
				break;
			case MONITOR_NAME:			 
				for(j = 5; j<18; j++)
                {     
                    monitor_name[j-5] = block[j];
					if(block[j] == 0x0A)
					{
#if 0 // Marlboro Debug; effect EDID checksum
						block[j] = 0x00;
#endif
                        monitor_name[j-5] = 0x00;
						break;
					}
                }
				EDID_DEBUG( "\tMonitor name: %s\n", monitor_name);	
				break;
			case MONITOR_LIMITS:
				EDID_DEBUG( "\tMin. Vertical rate (Hz): %d\n", block[5]);
				EDID_DEBUG( "\tMax. Vertical rate (Hz): %d\n", block[6]);			
				EDID_DEBUG( "\tMin. Horizontal rate (KHz): %d\n", block[7]);
				EDID_DEBUG( "\tMax. Horizontal rate (KHz): %d\n", block[8]);			
				EDID_DEBUG( "\tMax. Supported Pixel Clock rate (KHz): %d\n", block[9]*10);					
				if(block[10] == 0x00)
					EDID_DEBUG( "\tNo secondary timing supported\n");					
				else if(block[10] == 0x02)
				{
					EDID_DEBUG( "\tSecondary GTF  supported\n");						
				}
				break;	
			default:	
				break;				
	}

	}

    if(hdmi_drv->edid.block[0][0x7E] > MAX_EDID_BLOCKS_SUPPORT-1)
    {
        EDID_DEBUG("HDMI Driver: MAX_EDID_BLOCKS_SUPPORT(%d) not enouth!\n", MAX_EDID_BLOCKS_SUPPORT);  
        hdmi_drv->edid.number_of_extension_block =  MAX_EDID_BLOCKS_SUPPORT-1;
    }
    else
        hdmi_drv->edid.number_of_extension_block =  hdmi_drv->edid.block[0][0x7E];
	
	return 1;
}
  • 测试SHARP电视HDMI信息:
EDID 1.3 Content: 
00 ff ff ff ff ff ff 00 4d 10 04 10 01 01 01 01 
00 11 01 03 80 2c 19 78 0a ef ca a3 55 47 9a 24 
12 47 49 00 00 00 01 01 01 01 01 01 01 01 01 01 
01 01 01 01 01 01 01 1d 80 18 71 1c 16 20 58 2c 
25 00 b8 fa 10 00 00 9e 01 1d 00 72 51 d0 1e 20 
6e 28 55 00 b8 fa 10 00 00 1e 00 00 00 fc 00 53 
48 41 52 50 20 48 44 4d 49 0a 20 20 00 00 00 fd 
00 31 3d 1f 2e 08 00 0a 20 20 20 20 20 20 01 00 

Vendor and Product ID
        Manufacturer Name: SHP
        Product Code: 4100
        Serial Number: 16843009
        Week of Manufacture: 0
        Year of Manufacture: 2007

EDID Structure
        Version no.: 1
        Revision no.: 3

Basic Display Parameters and Features
        Video Input Signal Type: Digital
        VESA DFP 1.X default: Not Compatible
        Max Horz Size (in cm): 44
        Max Vert Size (in cm): 25
        Gamma Value: 2.20
        Feature Support (DPMS)
                 Standby Mode: Not Supported 
                 Suspend Mode: Not Supported 
                 Active Off Mode: Not Supported 
                 Display Type: RGB color display
                 Color Space: Alternate 
                 Preferred Timing: 1st DTD 
                 GTF Timing: Not Supported 

Phosphor or Filter Chromaticity
        Red_x: 0.639
        Red_y: 0.333
        Green_x: 0.280
        Green_y: 0.604
        Blue_x: 0.143
        Blue_y: 0.070
        White_x: 0.279
        White_y: 0.287

Established Timings
        Established Timings I 
                 None
        Established Timings II 
                 None
        Manufacturer's Timings
                 None

Standard Timings
        Standard Timing 1
                 Unused
        Standard Timing 2
                 Unused
        Standard Timing 3
                 Unused
        Standard Timing 4
                 Unused
        Standard Timing 5
                 Unused
        Standard Timing 6
                 Unused
        Standard Timing 7
                 Unused
        Standard Timing 8
                 Unused

Detailed Timing Descriptor 1
        Pixel clock (MHz): 74.25
        Horizontal active (pixels): 1920
        Horizontal blanking (pixels):  280
        Vertical active (lines):  540
        Vertical blanking (lines):  22
        Horizontal Sync offset (pixels):  88
        Horizontal Sync pulse width (pixels):  44
        Vertical Sync offset (lines):  2
        Vertical Sync pulse width (lines):  5
        Horizontal image size (mm): 440
        Vertical image size (mm): 250
        Scanning mode: Interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity +, HSYNC polarity +

Detailed Timing Descriptor 2
        Pixel clock (MHz): 74.25
        Horizontal active (pixels): 1280
        Horizontal blanking (pixels):  370
        Vertical active (lines):  720
        Vertical blanking (lines):  30
        Horizontal Sync offset (pixels):  110
        Horizontal Sync pulse width (pixels):  40
        Vertical Sync offset (lines):  5
        Vertical Sync pulse width (lines):  5
        Horizontal image size (mm): 440
        Vertical image size (mm): 250
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity +, HSYNC polarity +

Detailed Timing Descriptor 3
        Monitor name: SHARP HDMI

Detailed Timing Descriptor 4
        Min. Vertical rate (Hz): 49
        Max. Vertical rate (Hz): 61
        Min. Horizontal rate (KHz): 31
        Max. Horizontal rate (KHz): 46
        Max. Supported Pixel Clock rate (KHz): 80
        No secondary timing supported
EDID Extension Block(1): 
02 03 19 71 45 85 04 03 02 01 23 09 07 07 83 01 
00 00 66 03 0c 00 10 00 80 8c 0a d0 8a 20 e0 2d 
10 10 3e 96 80 b8 fa 10 00 00 18 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6f 
Tag: 2
Revision 3
Underscan: Not Supported
Basic audio: Supported
RGB and YCbCr444: Supported
RGB and YCbCr422: Supported
Total number of native DTDs: 1
Data Block Collection
Video Data Block:
[HDMI native]   VIC = 05 
        VIC = 05,Native 1920x1080i      59.94Hz/60Hz    16:9
        VIC = 04,       1280x720p       59.94Hz/60Hz    16:9
        VIC = 03,       720x480p        59.94Hz/60Hz    16:9
        VIC = 02,       720x480p        59.94Hz/60Hz    4:3
        VIC = 01,       640x480p        59.94Hz/60Hz    4:3
Audio Data Block:
        Audio format code: Linear PCM (e.g., IEC60958)
         Maximum number of channels: 2
        Audio code: Linear PCM (e.g., IEC60958)
        Maximum number of channels: 2
        Sample Rate: 48KHz 44.1KHz 32KHz 
        Sample Size: 24bit 20bit 16bit
Speaker Allocation Data Block:
        FL/FR 
VSDB Data Block:
HDMI DEVICE:
        IEEE registration ID: 0x000c03 (HDMI device)
        Physical address:  1.0.0.0
        Sink Support ACP, ISRC1, ISRC2 packet
Detailed Timing #0
        Pixel clock: 27.00MHz
        Horizontal active: 720 pixels
        Horizontal blanking: 138 pixels
        Vertical active:  480 lines
        Vertical blanking: 45 lines
        Horizontal Sync offset: 528 pixels
        Horizontal Sync pulse width: 62 pixels
        Vertical Sync offset: 9 lines
        Vertical Sync pulse width: 6 lines
        Horizontal image size: 440 mm
        Vertical image size: 250 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity -, HSYNC polarity -
Detailed Timing #1
        Pixel clock: 0.00MHz
        Horizontal active: 0 pixels
        Horizontal blanking: 0 pixels
        Vertical active:  0 lines
        Vertical blanking: 0 lines
        Horizontal Sync offset: 0 pixels
        Horizontal Sync pulse width: 0 pixels
        Vertical Sync offset: 0 lines
        Vertical Sync pulse width: 0 lines
        Horizontal image size: 0 mm
        Vertical image size: 0 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Analog composite
Detailed Timing #2
        Pixel clock: 0.00MHz
        Horizontal active: 0 pixels
        Horizontal blanking: 0 pixels
        Vertical active:  0 lines
        Vertical blanking: 0 lines
        Horizontal Sync offset: 0 pixels
        Horizontal Sync pulse width: 0 pixels
        Vertical Sync offset: 0 lines
        Vertical Sync pulse width: 0 lines
        Horizontal image size: 0 mm
        Vertical image size: 0 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Analog composite
Detailed Timing #3
        Pixel clock: 0.00MHz
        Horizontal active: 0 pixels
        Horizontal blanking: 0 pixels
        Vertical active:  0 lines
        Vertical blanking: 0 lines
        Horizontal Sync offset: 0 pixels
        Horizontal Sync pulse width: 0 pixels
        Vertical Sync offset: 0 lines
        Vertical Sync pulse width: 0 lines
        Horizontal image size: 0 mm
        Vertical image size: 0 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Analog composite
Detailed Timing #4
        Pixel clock: 0.00MHz
        Horizontal active: 0 pixels
        Horizontal blanking: 0 pixels
        Vertical active:  0 lines
        Vertical blanking: 0 lines
        Horizontal Sync offset: 0 pixels
        Horizontal Sync pulse width: 0 pixels
        Vertical Sync offset: 0 lines
        Vertical Sync pulse width: 0 lines
        Horizontal image size: 0 mm
        Vertical image size: 0 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Analog composite
hdmi_edid_clear
  • 测试Haier电视HDMI信息:
EDID 1.3 Content: 
00 ff ff ff ff ff ff 00 22 45 01 00 01 01 01 01 
0a 10 01 03 80 73 41 96 0a cf 74 a3 57 4c b0 23 
09 48 4c 2f ce 00 31 40 45 40 61 40 01 01 01 01 
01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 
36 00 00 d0 52 00 00 18 00 00 00 fd 00 38 55 1f 
3c 08 00 0a 20 20 20 20 20 20 00 00 00 fc 00 48 
41 49 45 52 20 54 56 0a 20 20 20 20 00 00 00 fc 
00 0a 20 20 20 20 20 20 20 20 20 20 20 20 01 b6 

Vendor and Product ID
        Manufacturer Name: HRE
        Product Code: 1
        Serial Number: 16843009
        Week of Manufacture: 10
        Year of Manufacture: 2006

EDID Structure
        Version no.: 1
        Revision no.: 3

Basic Display Parameters and Features
        Video Input Signal Type: Digital
        VESA DFP 1.X default: Not Compatible
        Max Horz Size (in cm): 115
        Max Vert Size (in cm): 65
        Gamma Value: 2.50
        Feature Support (DPMS)
                 Standby Mode: Not Supported 
                 Suspend Mode: Not Supported 
                 Active Off Mode: Not Supported 
                 Display Type: RGB color display
                 Color Space: Alternate 
                 Preferred Timing: 1st DTD 
                 GTF Timing: Not Supported 

Phosphor or Filter Chromaticity
        Red_x: 0.639
        Red_y: 0.339
        Green_x: 0.299
        Green_y: 0.690
        Blue_x: 0.137
        Blue_y: 0.038
        White_x: 0.282
        White_y: 0.296

Established Timings
        Established Timings I 
                 640 x 480 @ 60Hz IBM, VGA
                 640 x 480 @ 72Hz VESA
                 640 x 480 @ 75Hz VESA
                 800 x 600 @ 56Hz VESA
                 800 x 600 @ 60Hz VESA
        Established Timings II 
                 800 x 600 @ 72Hz VESA
                 800 x 600 @ 75Hz VESA
                 1024 x 768 @ 60Hz VESA
                 1024 x 768 @ 70Hz VESA
                 1024 x 768 @ 75Hz VESA
        Manufacturer's Timings
                 None

Standard Timings
        Standard Timing 1
                 Horizontal active pixels: 640
                 Image Aspect ratio: 4:3
                 Refresh Rate: 60 Hz
        Standard Timing 2
                 Horizontal active pixels: 800
                 Image Aspect ratio: 4:3
                 Refresh Rate: 60 Hz
        Standard Timing 3
                 Horizontal active pixels: 1024
                 Image Aspect ratio: 4:3
                 Refresh Rate: 60 Hz
        Standard Timing 4
                 Unused
        Standard Timing 5
                 Unused
        Standard Timing 6
                 Unused
        Standard Timing 7
                 Unused
        Standard Timing 8
                 Unused

Detailed Timing Descriptor 1
        Pixel clock (MHz): 65.00
        Horizontal active (pixels): 1024
        Horizontal blanking (pixels):  320
        Vertical active (lines):  768
        Vertical blanking (lines):  38
        Horizontal Sync offset (pixels):  24
        Horizontal Sync pulse width (pixels):  136
        Vertical Sync offset (lines):  3
        Vertical Sync pulse width (lines):  6
        Horizontal image size (mm): 1280
        Vertical image size (mm): 720
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity -, HSYNC polarity -

Detailed Timing Descriptor 2
        Min. Vertical rate (Hz): 56
        Max. Vertical rate (Hz): 85
        Min. Horizontal rate (KHz): 31
        Max. Horizontal rate (KHz): 60
        Max. Supported Pixel Clock rate (KHz): 80
        No secondary timing supported

Detailed Timing Descriptor 3
        Monitor name: HAIER TV

Detailed Timing Descriptor 4
        Monitor name: 
EDID Extension Block(1): 
02 03 17 f1 44 84 05 03 02 23 09 07 07 83 01 00 
00 65 03 0c 00 10 00 01 1d 00 72 51 d0 1e 20 6e 
28 55 00 c4 8e 21 00 00 1e 01 1d 80 18 71 1c 16 
20 58 2c 25 00 c4 8e 21 00 00 9e 8c 0a d0 8a 20 
e0 2d 10 10 3e 96 00 c4 8e 21 00 00 18 8c 0a d0 
8a 20 e0 2d 10 10 3e 96 00 13 8e 21 00 00 18 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ba 
Tag: 2
Revision 3
Underscan: Supported
Basic audio: Supported
RGB and YCbCr444: Supported
RGB and YCbCr422: Supported
Total number of native DTDs: 1
Data Block Collection
Video Data Block:
[HDMI native]   VIC = 04 
        VIC = 04,Native 1280x720p       59.94Hz/60Hz    16:9
        VIC = 05,       1920x1080i      59.94Hz/60Hz    16:9
        VIC = 03,       720x480p        59.94Hz/60Hz    16:9
        VIC = 02,       720x480p        59.94Hz/60Hz    4:3
Audio Data Block:
        Audio format code: Linear PCM (e.g., IEC60958)
         Maximum number of channels: 2
        Audio code: Linear PCM (e.g., IEC60958)
        Maximum number of channels: 2
        Sample Rate: 48KHz 44.1KHz 32KHz 
        Sample Size: 24bit 20bit 16bit
Speaker Allocation Data Block:
        FL/FR 
VSDB Data Block:
HDMI DEVICE:
        IEEE registration ID: 0x000c03 (HDMI device)
        Physical address:  1.0.0.0
Detailed Timing #0
        Pixel clock: 74.25MHz
        Horizontal active: 1280 pixels
        Horizontal blanking: 370 pixels
        Vertical active:  720 lines
        Vertical blanking: 30 lines
        Horizontal Sync offset: 110 pixels
        Horizontal Sync pulse width: 40 pixels
        Vertical Sync offset: 5 lines
        Vertical Sync pulse width: 5 lines
        Horizontal image size: 708 mm
        Vertical image size: 398 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity +, HSYNC polarity +
Detailed Timing #1
        Pixel clock: 74.25MHz
        Horizontal active: 1920 pixels
        Horizontal blanking: 280 pixels
        Vertical active:  540 lines
        Vertical blanking: 22 lines
        Horizontal Sync offset: 88 pixels
        Horizontal Sync pulse width: 44 pixels
        Vertical Sync offset: 2 lines
        Vertical Sync pulse width: 5 lines
        Horizontal image size: 708 mm
        Vertical image size: 398 mm
        Scanning mode: Interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity +, HSYNC polarity +
Detailed Timing #2
        Pixel clock: 27.00MHz
        Horizontal active: 720 pixels
        Horizontal blanking: 138 pixels
        Vertical active:  480 lines
        Vertical blanking: 45 lines
        Horizontal Sync offset: 16 pixels
        Horizontal Sync pulse width: 62 pixels
        Vertical Sync offset: 9 lines
        Vertical Sync pulse width: 6 lines
        Horizontal image size: 708 mm
        Vertical image size: 398 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity -, HSYNC polarity -
Detailed Timing #3
        Pixel clock: 27.00MHz
        Horizontal active: 720 pixels
        Horizontal blanking: 138 pixels
        Vertical active:  480 lines
        Vertical blanking: 45 lines
        Horizontal Sync offset: 16 pixels
        Horizontal Sync pulse width: 62 pixels
        Vertical Sync offset: 9 lines
        Vertical Sync pulse width: 6 lines
        Horizontal image size: 531 mm
        Vertical image size: 398 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Digital separate, VSYNC polarity -, HSYNC polarity -
Detailed Timing #4
        Pixel clock: 0.00MHz
        Horizontal active: 0 pixels
        Horizontal blanking: 0 pixels
        Vertical active:  0 lines
        Vertical blanking: 0 lines
        Horizontal Sync offset: 0 pixels
        Horizontal Sync pulse width: 0 pixels
        Vertical Sync offset: 0 lines
        Vertical Sync pulse width: 0 lines
        Horizontal image size: 0 mm
        Vertical image size: 0 mm
        Scanning mode: Non-interlaced
        Stereo: Normal display, no stereo.
        Sync mode: Analog composite

 

HarkerYX
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