modelsim版本:se 10.1a
仿真fifo时,modelsim报如下错误,看错误时找不到库文件,库已经编译过了,而且在modelsim里也能正常显示。
** Error: (vsim-3033) E:/work/lattice/test_plafrom/sdi_test_20220625/level_B_to_A/FIFO_A/FIFO_A.v(154): Instantiation of ‘AND2’ failed. The design unit was not found.
Region: /sdi_test_tb/uut3/u1_fifo_a
Searched libraries:
E:\work\lattice\test_plafrom\sdi_test_20220623\sdi_models\work
解决办法:在mdoelsim-simulate-start simlation-libraries-add,添加modelsim已编译的库。如下图所示。
** Error: (vsim-3043) D:/lscc/diamond/3.12/cae_library/simulation/verilog/ecp3/FD1P3DX.v(38): Unresolved reference to ‘GSR_INST’.
Region: /sdi_test_tb/uut3/u1_fifo_first_row/FF_1
** Error: (vsim-3043) D:/lscc/diamond/3.12/cae_library/simulation/verilog/ecp3/FD1P3DX.v(39): Unresolved reference to ‘PUR_INST’.
解决办法:添加
GSR GSR_INST(.GSR(1’b1));
PUR PUR_INST(.PUR(1’b1));
Error 2019990 Synthesis ERROR - CG389 :“E:\lattice\S8801\programme\s8801_nx40\3dlut\s8801_3d_lut_202208310953\par\impl_1\reveal_workspace\tmpreveal\lvds_mipi_rot_1080_to_2k_rvl_top.v”:761:28:761:53|Reference to undefined module hdmi_timing_partten_gen [lvds_mipi_rot_1080_to_2k_rvl_top.v:761]
解决办法:将文件添加入工程中。