Gate Count
在论文经常可以看到'Gate Count'一词,一直以为就是DC综合出来的‘Number of Cells’, Google之后才知道并非如此。
Gate Count = Total area / area of NAND2 gate
下面一段话来自于www.edaboard.com。
‘Because Design Compiler doesn't derive any area units, the number reported by report_area is actually the sum of the area attribute attached to cells in the technology library. Basically, you have to ask the vendor what the area units mean. For example, some library vendors might define the area to be (sqmm x sqmm) or normalized to the size of a 2-input NAND gate. That is,
a 2-input NAND gate has an area of 1.’
用DC产生Gate Count
‘To get the equivalent gate area in Design compiler need to add two comamnds in TCl script.
1. First to get the total area of your design, use report_area.
2. Then divide this area by the area for a 2-input NAND gate in your technology library. You can also use the following command to find out the area for a 2-input nand gate.
dc_shell-xg-t> get_attribute { technology library/2_input_nand_gate_name } area
to get the 2_input_nand_gate_name, use report_lib <tecnology_lib > and select the any drive strength. Usually its 1x drive strength.
Area = $report_area/Area_of nand gate’