1. 虽然现在可以引导内核了,但是读取内核(2M)时间太长,大约需要17-18秒,这样算下来1s才能读取100多K,这太不合理了!所以首先想到的是nand flash的读取函数有问题,查了半天没有查出问题。那么既然nand flash 读取数据没有问题,那么是不是传输的某个阶段有问题了呢?从这个思路入手,噢,发现原来是cache没有打开。
3. 烧到板子上发现,现在读取速度有提升,读取内核(2M)的时间由原来的17-18秒,减少到3-4秒。把这个bootloader与烧录的bootloader相比,还是有差距。烧录的bootloader跟本不需要等,刷一下子就进入内核引导了!这怎么可能?该初始化的都初始化了,该enable的都enable了。难道还有什么猫腻?查啊查,查啊查,始终查不出什么问题来。偶然发现自带的bootloader里面有优化选项 -Os,而我自己的没有打开任何的优化选项,默认是-O0.
2. main.c 开启icache 与 dcache
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- #include "uart.h"
- #include "nand.h"
-
- #define C1_IC (1<<12) /* icache off/on */
- #define C1_DC (1<<2) /* dcache off/on */
- /* read co-processor 15, register #1 (control register) */
- static unsigned long read_p15_c1 (void)
- {
- unsigned long value;
-
- __asm__ __volatile__(
- "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
- : "=r" (value)
- :
- : "memory");
- return value;
- }
-
- /* write to co-processor 15, register #1 (control register) */
- static void write_p15_c1 (unsigned long value)
- {
- __asm__ __volatile__(
- "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
- :
- : "r" (value)
- : "memory");
-
- read_p15_c1 ();
- }
-
-
- static void cp_delay (void)
- {
- volatile int i;
-
- /* copro seems to need some delay between reading and writing */
- for (i = 0; i < 100; i++);
- }
-
- /* It makes no sense to use the dcache if the MMU is not enabled */
- void dcache_enable (void)
- {
- unsigned long reg;
-
- reg = read_p15_c1 ();
- cp_delay ();
- write_p15_c1 (reg | C1_DC);
- }
-
- void icache_enable (void)
- {
- unsigned long reg;
-
- reg = read_p15_c1 (); /* get control reg. */
- cp_delay ();
- write_p15_c1 (reg | C1_IC);
- }
-
-
- extern int boot_zImage(unsigned long from, unsigned long size);
- void main(void)
- {
- uart_init(); //初始化串口
- nand_init();
-
- icache_enable();
- dcache_enable();
-
- uart_printf("now boot the kernel\n");
-
- boot_zImage(0x200000, 0x200000);
- }
4. 将Makefile 加入 OPTFLAGS= -Os,试一下,也是刷一下子进入内核引导了。
5. 问题己经解决,但是-Os与-OO对nandflash的读取速度影响怎么会这么大呢?有时间研究一下。
myboot_loader_mod.rar (将后缀rar改为tar.gz)