主要结构体
/* module pin mux structure */
struct pinmux_config {
const char *string_name; /* signal name format */
int val; /* Options for the mux register value */
};
struct omap_mux {
u16 reg_offset;
u16 gpio;
#ifdef CONFIG_OMAP_MUX
char *muxnames[OMAP_MUX_NR_MODES];
#ifdef CONFIG_DEBUG_FS
char *balls[OMAP_MUX_NR_SIDES];
#endif
#endif
};
struct omap_mux {
u16 reg_offset;
u16 gpio;
#ifdef CONFIG_OMAP_MUX
char *muxnames[OMAP_MUX_NR_MODES];
#ifdef CONFIG_DEBUG_FS
char *balls[OMAP_MUX_NR_SIDES];
#endif
#endif
};
struct omap_mux_partition {
const char *name;
u32 flags;
u32 phys;
u32 size;
void __iomem *base;
struct list_head muxmodes;
struct list_head node;
};
struct omap_mux_entry {
struct omap_mux mux;
struct list_head node;
};
struct omap_mux_partition {
const char *name;
u32 flags;
u32 phys;
u32 size;
void __iomem *base;
struct list_head muxmodes;
struct list_head node;
};
struct omap_mux_entry {
struct omap_mux mux;
struct list_head node;
};
/* AM33XX pin mux super set */
static struct omap_mux am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(GPMC_AD0, 0,
"gpmc_ad0", "mmc1_dat0", NULL, NULL,
NULL, NULL, NULL, "gpio1_0"),
_AM33XX_MUXENTRY(GPMC_AD1, 0,
"gpmc_ad1", "mmc1_dat1", NULL, NULL,
NULL, NULL, NULL, "gpio1_1"),
_AM33XX_MUXENTRY(GPMC_AD2, 0,
"gpmc_ad2", "mmc1_dat2", NULL, NULL,
NULL, NULL, NULL, "gpio1_2"),
_AM33XX_MUXENTRY(GPMC_AD3, 0,
"gpmc_ad3", "mmc1_dat3", NULL, NULL,
NULL, NULL, NULL, "gpio1_3"),
_AM33XX_MUXENTRY(GPMC_AD4, 0,
"gpmc_ad4", "mmc1_dat4", NULL, NULL,
NULL, NULL, NULL, "gpio1_4"),
_AM33XX_MUXENTRY(GPMC_AD5, 0,
"gpmc_ad5", "mmc1_dat5", NULL, NULL,
NULL, NULL, NULL, "gpio1_5"),
_AM33XX_MUXENTRY(GPMC_AD6, 0,
"gpmc_ad6", "mmc1_dat6", NULL, NULL,
NULL, NULL, NULL, "gpio1_6"),
_AM33XX_MUXENTRY(GPMC_AD7, 0,
"gpmc_ad7", "mmc1_dat7", NULL, NULL,
NULL, NULL, NULL, "gpio1_7"),
_AM33XX_MUXENTRY(GPMC_AD8, 0,
"gpmc_ad8", "lcd_data16", "mmc1_dat0", "mmc2_dat4",
NULL, NULL, NULL, "gpio0_22"),
_AM33XX_MUXENTRY(GPMC_AD9, 0,
"gpmc_ad9", "lcd_data17", "mmc1_dat1", "mmc2_dat5",
"ehrpwm2B", NULL, NULL, "gpio0_23"),
_AM33XX_MUXENTRY(GPMC_AD10, 0,
"gpmc_ad10", "lcd_data18", "mmc1_dat2", "mmc2_dat6",
NULL, NULL, NULL, "gpio0_26"),
_AM33XX_MUXENTRY(GPMC_AD11, 0,
"gpmc_ad11", "lcd_data19", "mmc1_dat3", "mmc2_dat7",
NULL, NULL, NULL, "gpio0_27"),
_AM33XX_MUXENTRY(GPMC_AD12, 0,
"gpmc_ad12", "lcd_data20", "mmc1_dat4", "mmc2_dat0",
NULL, NULL, NULL, "gpio1_12"),
_AM33XX_MUXENTRY(GPMC_AD13, 0,
"gpmc_ad13", "lcd_data21", "mmc1_dat5", "mmc2_dat1",
NULL, NULL, NULL, "gpio1_13"),
_AM33XX_MUXENTRY(GPMC_AD14, 0,
"gpmc_ad14", "lcd_data22", "mmc1_dat6", "mmc2_dat2",
NULL, NULL, NULL, "gpio1_14"),
_AM33XX_MUXENTRY(GPMC_AD15, 0,
"gpmc_ad15", "lcd_data23", "mmc1_dat7", "mmc2_dat3",
NULL, NULL, NULL, "gpio1_15"),
_AM33XX_MUXENTRY(GPMC_A0, 0,
"gpmc_a0", "mii2_txen", "rgmii2_tctl", "rmii2_txen",
NULL, NULL, NULL, "gpio1_16"),
_AM33XX_MUXENTRY(GPMC_A1, 0,
"gpmc_a1", "mii2_rxdv", "rgmii2_rctl", "mmc2_dat0",
NULL, NULL, NULL, "gpio1_17"),
_AM33XX_MUXENTRY(GPMC_A2, 0,
"gpmc_a2", "mii2_txd3", "rgmii2_td3", "mmc2_dat1",
NULL, NULL, NULL, "gpio1_18"),
_AM33XX_MUXENTRY(GPMC_A3, 0,
"gpmc_a3", "mii2_txd2", "rgmii2_td2", "mmc2_dat2",
NULL, NULL, NULL, "gpio1_19"),
_AM33XX_MUXENTRY(GPMC_A4, 0,
"gpmc_a4", "mii2_txd1", "rgmii2_td1", "rmii2_txd1",
"gpmc_a20", NULL, NULL, "gpio1_20"),
_AM33XX_MUXENTRY(GPMC_A5, 0,
"gpmc_a5", "mii2_txd0", &#
/* AM33XX pin mux super set */
static struct omap_mux am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(GPMC_AD0, 0,
"gpmc_ad0", "mmc1_dat0", NULL, NULL,
NULL, NULL, NULL, "gpio1_0"),
_AM33XX_MUXENTRY(GPMC_AD1, 0,
"gpmc_ad1", "mmc1_dat1", NULL, NULL,
NULL, NULL, NULL, "gpio1_1"),
_AM33XX_MUXENTRY(GPMC_AD2, 0,
"gpmc_ad2", "mmc1_dat2", NULL, NULL,
NULL, NULL, NULL, "gpio1_2"),
_AM33XX_MUXENTRY(GPMC_AD3, 0,
"gpmc_ad3", "mmc1_dat3", NULL, NULL,
NULL, NULL, NULL, "gpio1_3"),
_AM33XX_MUXENTRY(GPMC_AD4, 0,
"gpmc_ad4", "mmc1_dat4", NULL, NULL,
NULL, NULL, NULL, "gpio1_4"),
_AM33XX_MUXENTRY(GPMC_AD5, 0,
"gpmc_ad5", "mmc1_dat5", NULL, NULL,
NULL, NULL, NULL, "gpio1_5"),
_AM33XX_MUXENTRY(GPMC_AD6, 0,
"gpmc_ad6", "mmc1_dat6", NULL, NULL,
NULL, NULL, NULL, "gpio1_6"),
_AM33XX_MUXENTRY(GPMC_AD7, 0,
"gpmc_ad7", "mmc1_dat7", NULL, NULL,
NULL, NULL, NULL, "gpio1_7"),
_AM33XX_MUXENTRY(GPMC_AD8, 0,
"gpmc_ad8", "lcd_data16", "mmc1_dat0", "mmc2_dat4",
NULL, NULL, NULL, "gpio0_22"),
_AM33XX_MUXENTRY(GPMC_AD9, 0,
"gpmc_ad9", "lcd_data17", "mmc1_dat1", "mmc2_dat5",
"ehrpwm2B", NULL, NULL, "gpio0_23"),
_AM33XX_MUXENTRY(GPMC_AD10, 0,
"gpmc_ad10", "lcd_data18", "mmc1_dat2", "mmc2_dat6",
NULL, NULL, NULL, "gpio0_26"),
_AM33XX_MUXENTRY(GPMC_AD11, 0,
"gpmc_ad11", "lcd_data19", "mmc1_dat3", "mmc2_dat7",
NULL, NULL, NULL, "gpio0_27"),
_AM33XX_MUXENTRY(GPMC_AD12, 0,
"gpmc_ad12", "lcd_data20", "mmc1_dat4", "mmc2_dat0",
NULL, NULL, NULL, "gpio1_12"),
_AM33XX_MUXENTRY(GPMC_AD13, 0,
"gpmc_ad13", "lcd_data21", "mmc1_dat5", "mmc2_dat1",
NULL, NULL, NULL, "gpio1_13"),
_AM33XX_MUXENTRY(GPMC_AD14, 0,
"gpmc_ad14", "lcd_data22", "mmc1_dat6", "mmc2_dat2",
NULL, NULL, NULL, "gpio1_14"),
_AM33XX_MUXENTRY(GPMC_AD15, 0,
"gpmc_ad15", "lcd_data23", "mmc1_dat7", "mmc2_dat3",
NULL, NULL, NULL, "gpio1_15"),
_AM33XX_MUXENTRY(GPMC_A0, 0,
"gpmc_a0", "mii2_txen", "rgmii2_tctl", "rmii2_txen",
NULL, NULL, NULL, "gpio1_16"),
_AM33XX_MUXENTRY(GPMC_A1, 0,
"gpmc_a1", "mii2_rxdv", "rgmii2_rctl", "mmc2_dat0",
NULL, NULL, NULL, "gpio1_17"),
_AM33XX_MUXENTRY(GPMC_A2, 0,
"gpmc_a2", "mii2_txd3", "rgmii2_td3", "mmc2_dat1",
NULL, NULL, NULL, "gpio1_18"),
_AM33XX_MUXENTRY(GPMC_A3, 0,
"gpmc_a3", "mii2_txd2", "rgmii2_td2", "mmc2_dat2",
NULL, NULL, NULL, "gpio1_19"),
_AM33XX_MUXENTRY(GPMC_A4, 0,
"gpmc_a4", "mii2_txd1", "rgmii2_td1", "rmii2_txd1",
"gpmc_a20", NULL, NULL, "gpio1_20"),
_AM33XX_MUXENTRY(GPMC_A5, 0,
"gpmc_a5", "mii2_txd0", &#