代码模块
//定义输入输出
module mux_to_1(out,i0,i1,i2,i3,s1,s0);
//一路输出
output out;
//四路输入
input i0,i1,i2,i3;
//两路选择
input s1,s0;
//内部线网
wire s1n,s0n;
wire y0,y1,y2,y3;
//生成s1n和s0n
not (s1n,s1);
not (s0n,s0);
//调用三输入与门,选择四路输出
and(y0,i0,s1n,s0n);
and(y1,i1,s1n,s0);
and(y2,i2,s1,s0n);
and(y3,i3,s1,s0);
//确定输出
or (out,y0,y1,y2,y3);
endmodule
testbench
`timescale 1ns / 1ps
module tb_mux_to_1();
reg i0,i1,i2,i3;
reg s1,s0;
wire out;
initial
begin
i0=1;
i1=0;
i2=1;
i3=0;
#1 $display("i0=%b,i1=%b,i2=%b,i3=%b \n",i0,i1,i2,i3);
s1=0;s0=0;
#1 $display("s1=%b,s0=%b,out=%b \n",s1,s0,out);
s1=0;s0=1;
#1 $display("s1=%b,s0