u-boot-2016.11移植uboot-spl.bin

一、时钟初始化
1、修改clock.h
cd arch/arm/mach-s5pv210/include/mach/
vim clock.h 
/* add by Sourcelink */
struct s5pv210_clock {
        unsigned int    apll_lock;
        unsigned char   res1[0x04];
        unsigned int    mpll_lock;
        unsigned char   res2[0x04];
        unsigned int    epll_lock;
        unsigned char   res3[0x0c];
        unsigned int    vpll_lock;
        unsigned char   res4[0xdc];
        unsigned int    apll_con0;
        unsigned int    apll_con1;
        unsigned int    mpll_con;
        unsigned char   res5[0x04];
        unsigned int    epll_con0;
        unsigned int    epll_con1;
        unsigned char   res6[0x08];
        unsigned int    vpll_con;
        unsigned char   res7[0xdc];
        unsigned int    clk_src0;
        unsigned int    clk_src1;
        unsigned int    clk_src2;
        unsigned int    clk_src3;
        unsigned int    clk_src4;
        unsigned int    clk_src5;
        unsigned int    clk_src6;
        unsigned char   res8[0x64];
        unsigned int    clk_src_mask0;
        unsigned int    clk_src_mask1;
        unsigned char   res9[0x78];
        unsigned int    clk_div0;
        unsigned int    clk_div1;
        unsigned int    clk_div2;
        unsigned int    clk_div3;
	unsigned int    clk_div4;
        unsigned int    clk_div5;
        unsigned int    clk_div6;
        unsigned int    clk_div7;
        unsigned char   res10[0x24];
        unsigned int    clk_gate_sclk;
        unsigned char   res11[0x18];
        unsigned int    clk_gate_ip0;
        unsigned int    clk_gate_ip1;
        unsigned int    clk_gate_ip2;
        unsigned int    clk_gate_ip3;
        unsigned int    clk_gate_ip4;
        unsigned char   res12[0x0c];
        unsigned int    clk_gate_block;
        unsigned int    clk_gate_ip5;
};

2、增加clock初始化函数
cd board/samsung/smdkv210/
vim smdkv210.c
void clock_init(void)
{
        u32 val = 0;

        struct s5pv210_clock *const clock = (struct s5pv210_clock *)samsung_get_base_clock();

        /* 1.设置PLL锁定值 */
        writel(0xFFFF, &clock->apll_lock);
        writel(0xFFFF, &clock->mpll_lock);
        writel(0xFFFF, &clock->epll_lock);
        writel(0xFFFF, &clock->vpll_lock);

        /* 2.设置PLL的PMS值(使用芯片手册推荐的值)，并使能PLL */
        /*              P                   M                     S                  EN */
        writel((3  << 8) | (125 << 16) | (1 << 0) | (1 << 31), &clock->apll_con0);      /* FOUT_APLL = 1000MHz */
        writel((12 << 8) | (667 << 16) | (1 << 0) | (1 << 31), &clock->mpll_con);       /* FOUT_MPLL = 667MHz */
        writel((3  << 8) | (48  << 16) | (2 << 0) | (1 << 31), &clock->epll_con0);      /* FOUT_EPLL = 96MHz */
        writel((6  << 8) | (108 << 16) | (3 << 0) | (1 << 31), &clock->vpll_con);       /* FOUT_VPLL = 54MHz */

        /* 3.等待PLL锁定 */
        while (!(readl(&clock->apll_con0) & (1 << 29)));
        while (!(readl(&clock->mpll_con) & (1 << 29)));
        while (!(readl(&clock->apll_con0) & (1 <<