The Zynq-7000 SoC solution reduces the complexity of an embedded design by offering an Arm Cortex-A9 dual core as an embedded block, along with programmable logic on a single SoC.
For Zynq devices, the Vivado IP integrator captures information about the processing system (PS) and peripherals, including configuration settings, register memory-map, and associated logic in the programming logic (PL) fabric. You can then generate a bitstream for PL initialization.
The following figure illustrates the tools flow for the embedded hardware of a Zynq device:
完成一个设计,可按照以下步骤执行To complete an embedded processor design, you typically go through the following steps: