2440核心初始化

异常向量表

1. 异常：
   因为内部或者外部的一些事件，导致处理器停下正在处理的工作，转而去处理这些发生的时间。
   Resset 重启异常
   Undefined instructions 未定义异常
   Software interrupt 软件中断异常
   Prefeth Abort 预取指令异常
   dATA aBORT 赌气数据失败残生的Data Abort异常
   IRQ 中断异常
   FIQ 快速中断异常

2. 异常向量：
   当一种异常发生的时候，ARM处理器会跳转到对应异常的固定地址去执行异常处理程序，而这个固定的地址，就称之为异常向量。

3. 异常向量表：
   由7个异常及其处理函数跳转关系组成的表即为异常向量表
   0x00000000: b reset
   0x00000004: ldr pc, _undefined_instruction
   0x00000008: ldr pc, _software_interrupt
   0x0000000c: ldr pc, _prefetch_abort
   0x00000010: ldr pc, _data_abort
   0x00000014: ldr pc, _not_used
   0x00000018: ldr pc, _irq
   0x0000001c: ldr pc, _fiq

4. 范例代码：

.text
.global _start
_start:
        b   reset                       
        ldr pc, _undefined_instruction  
        ldr pc, _software_interrupt     
        ldr pc, _prefetch_abort         
        ldr pc, _data_abort             
        ldr pc, _not_used               
        ldr pc, _irq                    
        ldr pc, _fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt:    .word software_interrupt
_prefetch_abort:    .word prefetch_abort
_data_abort:        .word data_abort
_not_used:      .word not_used
_irq:           .word irq
_fiq:           .word fiq                   

undefined_instruction:
        nop

software_interrupt:
        nop

prefetch_abort:
        nop

data_abort:
        nop

not_used:
        nop

irq:
        nop

fiq:
        nop

reset:
        nop

设置svc模式

范例代码：

.text
.global _start
_start:
        b   reset                       
        ldr pc, _undefined_instruction  
        ldr pc, _software_interrupt     
        ldr pc, _prefetch_abort         
        ldr pc, _data_abort             
        ldr pc, _not_used               
        ldr pc, _irq                    
        ldr pc, _fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt:    .word software_interrupt
_prefetch_abort:    .word prefetch_abort
_data_abort:        .word data_abort
_not_used:      .word not_used
_irq:           .word irq
_fiq:           .word fiq                   

undefined_instruction:
        nop

software_interrupt:
        nop

prefetch_abort:
        nop

data_abort:
        nop

not_used:
        nop

irq:
        nop

fiq:
        nop

reset:
        bl set_svc

set_svc:
        mrs r0, cpsr
        bic r0, r0, #0x1f
        orr r0, r0, #0xd3
        msr cpsr, r0
        mov pc, lr

关闭看门狗

.text
.global _start
_start:
        b   reset                       
        ldr pc, _undefined_instruction  
        ldr pc, _software_interrupt     
        ldr pc, _prefetch_abort         
        ldr pc, _data_abort             
        ldr pc, _not_used               
        ldr pc, _irq                    
        ldr pc, _fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt:    .word software_interrupt
_prefetch_abort:    .word prefetch_abort
_data_abort:        .word data_abort
_not_used:      .word not_used
_irq:           .word irq
_fiq:           .word fiq                   

undefined_instruction:
        nop

software_interrupt:
        nop

prefetch_abort:
        nop

data_abort:
        nop

not_used:
        nop

irq:
        nop

fiq:
        nop

reset:
        bl set_svc
        bl disable_watchdog

set_svc:
        mrs r0, cpsr
        bic r0, r0, #0x1f
        orr r0, r0, #0xd3
        msr cpsr, r0
        mov pc, lr

#define pWTCON 0x53000000
disable_watchdog:
        ldr r0, =pWTCON
        mov r1, #0x0
        str r1, [r0]
        mov pc, lr

关闭中断

.text
.global _start
_start:
    b reset
    ldr pc, _undifined_instruction
    ldr pc, _software_interrupt
    ldr pc, _prefetch_abort
    ldr pc, _data_abort
    ldr pc, _not_used
    ldr pc, _irq
    ldr pc, _fiq


_undifined_instruction: .word undifined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word reset

undifined_instruction:
    nop

software_interrupt:
    nop

prefetch_abort:
    nop

data_abort:
    nop

not_used:
    nop

irq:
    nop

fiq:    
    nop

reset:
    bl set_svc
    bl disable_watchdog
    bl disable_interrupt

set_svc:
    mrs r0, cpsr
    bic r0, r0,#0x1f
    orr r0, r0,#0xd3
    msr cpsr, r0
    mov pc, lr

#define pWTCON 0x53000000
disable_watchdog:
    ldr r0, =pWTCON
    mov r1, #0x0
    str r1, [r0]
    mov pc, lr

disable_interrupt:
    mvn r1, #0x0
    ldr r0, =0x4a000008
    str r1, [r0]
    mov pc, lr

关闭MMU

.text
.global _start
_start:
    b reset
    ldr pc, _undifined_instruction
    ldr pc, _software_interrupt
    ldr pc, _prefetch_abort
    ldr pc, _data_abort
    ldr pc, _not_used
    ldr pc, _irq
    ldr pc, _fiq


_undifined_instruction: .word undifined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word reset

undifined_instruction:
    nop

software_interrupt:
    nop

prefetch_abort:
    nop

data_abort:
    nop

not_used:
    nop

irq:
    nop

fiq:    
    nop

reset:
    bl set_svc
    bl disable_watchdog
    bl disable_interrupt
    bl disable_mmu

set_svc:
    mrs r0, cpsr
    bic r0, r0,#0x1f
    orr r0, r0,#0xd3
    msr cpsr, r0
    mov pc, lr

#define pWTCON 0x53000000
disable_watchdog:
    ldr r0, =pWTCON
    mov r1, #0x0
    str r1, [r0]
    mov pc, lr

disable_interrupt:
    mvn r1, #0x0
    ldr r0, =0x4a000008
    str r1, [r0]
    mov pc, lr

disable_mmu:
    mcr p15,0,r0,c7,c7,0
    mrc p15,0,r0,c1,c0,0
    bic r0, r0, #0x00000007
    mcr p15,0,r0,c1,c0,0
    mov pc, lr