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最新推荐文章于 2024-04-24 11:43:09 发布

Lu_ming

最新推荐文章于 2024-04-24 11:43:09 发布

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MSR{condition} (CPSR or SPSR)_<field>, operand

MSR is used to get the content of CPSR or SPSR into a register or immediate operand. The <field> is set some
special bits in CPSR or SPSR.

bits[31:24] are condition bits, "f" representing;
bits[23:16] are status bits, "s" representing;
bits[15:8] are extension bits, "x" representing;
bits[7:0] are control bits, "c" representing;

R14_<Exception_Mode> = Return Link
SPSR_<Exception_Mode> = CPSR
CPSR[4:0] = Exception Mode Number
CPSR[5] = 0 ; when run at ARM mode
If <Exception_Mode> == Reset or FIQ then
CPSR[6] = 1 ; when FIQ occur, disable new coming FIQ exception
CPSR[7] = 1
PC = Exception Vector Address