CE162 Lec04
Combinatorial Logic
- Combinational Circuits:
- Output(s) depend only on the current state of inputs, (within the limits of physical propagation delays)
- Sequential circuits: (also known as Finite State Machines)
- Current output depends on current inputs and previous outputs
- Combinational circuits implemented using
- Logic Gates
- Lookup Tables (memory)
- Specification typically starts with Truth Table:
- Specifies how each output depends on all possible combinations of the inputs
- Design process:
- Boolean Algebra
- Boolean Algebra in combination with Karnaugh Maps
Representing Logic Symbols
- Electronic logic signal takes one of two possible levels
- Positive Logic: (正低零)
Low: Logic 0 FALSE
High: Logic 1 TRUE - Negative Logic:
Low: Logic 1 TRUE
High: Logic 0 FALSE - 常用正 负也常见
- Positive Logic: (正低零)
- Physical Voltage Levels
Basic Logic Functions
NOT gate
- Truth Table
- Boolean representation
- Logical Symbols (used in circuit diagrams)
- Waveform
AND gate
- Truth Table
- Boolean Algebra representation
Z=A·B or Z=AB - Logical Symbols
- Waveform (双1才1 否则就0)
OR gate
- Truth Table
- Boolean Algebra representation
Z=A+B - Logical Symbols
- Waveform (有1就1 双0才0)
XOR gate (异或门)
- Truth Table
- Boolean Algebra representation
Z=A ⊕ B= A·B + A·B - Logical Symbols
- Waveform (一样就0 不一样就1)
- 由与、或、非构成的异或逻辑运算
NAND gate (与非门)
- Truth Table
- Boolean Algebra representation
- Logical Symbols
- Waveform (全1才0 否则全1)
- Possible to implement any combinational circuit using just NAND or NOR gates.
- NAND gates very easy to manufacture: two-input NAND gate requires two CMOS transistors.
- Because their implementation was so simple, NAND gates were the preferred basic logic element in the bipolar Transistor-Transistor Logic family (TTL).
NOR gate (或非门)
- Truth Table
- Boolean Algebra representation
- Logical Symbols
- Waveform (全0才1 否则全0)
- A multi-input NOR gate can be made with one npn bipolar transistor (a bipolar junction transistor) and some resistors
同或门
- 真值表
- 逻辑表达式
- 逻辑符号
Logic/Digital Signals
The Ideal
In a periodic digital waveform, it’s common to refer to its ‘mark-to-space ratio’: relative time spent at High (logic 1) and Low (logic 0) states
- Period = mark + space
- T = 1 / frequency
The Practical
- Distortions arise from stray coupling (杂散耦合) between conductors, both capacitive and inductive, and because conductors behave like ‘transmission lines’, an effect that becomes increasingly apparent at high frequencies
- All logic devices introduce propagation delay (传播延迟)
- Waveforms do not change state ‘instantaneously’
- Propagation delay
- Rise time 上升时间
- Fall time 下降时间
Waveforms
- Waveform carrying continuous digital (binary) information
- the basis of all synchronous digital signal systems
- Signal transitions will occur at integer multiples of the timing clock period
- This information is used to ‘recover’ the timing waveform at a digital receiver
- This avoids the need to transmit a clock waveform in parallel with the data waveform
- Compare with asynchronous data transmission, where the clock recovery method is different
Logic rules
Product of Sums (PoS) and Sum of Products (SoP)
- PoS (和的积) functions can be done with two stages of NOR gates
- SoP (积的和) expressions are implemented using two stages of NAND gates
- Since NAND gates are the commonest type, 所以乘积的加和(SoP)形式常见
Karnaugh Maps
- 二变量卡诺图(中间翻折打开)
- 三变量卡诺图(向下翻折打开)
- 四变量卡诺图(向下翻折打开)
- 循环相邻性
- 任何一行两端的最小项仅有一个变量不同
- 任何一列两端的最小项仅有一个变量不同
- 出现的项卡诺图中填1 否则填0
- 化简
- 为1的相邻项 并画一个包围圈(每个包围圈含2n个方格)
- 写出每个包围圈的乘积项(去掉不同的(存在0和1两种状态的))
- 将所有包围圈对应的乘积项相加
- 包围圈
- 循环相邻特性包括上、下底相邻,左、右边相邻和四角两两相邻
- 同一方格可以被不同的包围圈重复包围多次,但新增的包围圈中一定要有新的方格
- 一个包围圈的方格数要尽可能多,包围圈的数目要可能少
Gray Codes
- Only change 1-bit at a time
- Application: Rotational measurement
- Convert
-
二进制转格雷
- Most significant bit (MSB) in binary = MSB in gray code (最高位不变)
- From left to right, add each adjacent pair of binary codes to get gray bit, discard carries (从左到右 相邻位相加 去掉进位)
-
格雷转二进制
- MSB in Gray code = MSB in binary code (最高位不变)
- Add each binary bit to Gray code in next position, discard carries (得到的二进制码与下一位格雷码相加 去掉进位)
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