本文总结tilelink 里edge的函数,为了更好的理解代码
def addr_hi(x: UInt): UInt = x >> log2Ceil(manager.beatBytes)
def addr_lo(x: UInt): UInt =
if (manager.beatBytes == 1) UInt(0) else x(log2Ceil(manager.beatBytes)-1, 0)
def addr_hi(x: TLAddrChannel): UInt = addr_hi(address(x))
def addr_lo(x: TLAddrChannel): UInt = addr_lo(address(x))
其中log2Ceil是取对数向上取整,比如log2Ceil(5)=3,manager.beatBytes是总线data位宽,必须是2的幂指数
比如当data位宽为32的时候,beatsBytes=4 x这里是bundleA.address,address>>log2(4),意思就是取到一个beats传输的高位地址,比如1000~1100为一个8Bytes的beat所需要的地址,addr_hi就取到了1.
addr_lo是低位地址。
def numBeats(x: TLChannel): UInt = {
x match {
case _: TLBundleE => UInt(1)
case bundle: TLDataChannel => {
val hasData = this.hasData(bundle)
val size = this.size(bundle)
val cutoff = log2Ceil(manager.beatBytes