我们必须找到除了爱情之外，能够让我们用双脚，坚强站立的东西。

翻译 不要挤

不要挤 -狄更斯你不要挤！世界这么大，它容得了你，也容得了我。所有的大门都敞开着，思想的王国是自由的天地。你可以尽情的追求，追求那人间最好的一切，只是你得保证，保证你自己不使别人感受压抑。不要把善良从心灵深处挤走，更得严防丑恶偷偷潜入你心底。给道德以应有的地位，以每一件好事以恰当的鼓励。让每一天成为一项严俊的记录，面对着它

转载 GRE题型

考完试，一个月的。。休息时间。。回来备战 GRE 。 7月底上战场。vocabulary : 单空，两空，三空，句子等价，essay： issue and argument.Math: terminology

转载 QNX内核简介

1 QNX内核简介QNX的微内核结构是它区别于其它操作系统的显著特点。平板式内存结构，所有的程序都使用同一个地址空间，不加保护；应用程序可以自由访问所有空间，效率较高，但是任何应用程序指针错误都可能会导致内核崩溃。大内核内存结构，如图2所示，操作系统内核和各种驱动程序、网络协议在同一个地址空间，应用程序在单独空间；内核模块同处于一个保护空间，运行效率高，应用程序无法直接访问

转载 高速宽带接入，敲响电信丧钟！

http://hi.baidu.com/javami/blog/item/97bbd92a9923d992033bf6dc.html社会观察：1、在当前ADSL宽带速度1-2兆的基础上，让宽带费用（包年700-1000元左右）降低一半，则传统PSTN电话网基本可以宣布退休。若宽带速度提高到5-10兆，则电话网可以正式宣布退休。分析：所以说宽带速度1-2兆只能让电话网基本退休

转载 “everything over IP over everything”含义说明

http://hi.baidu.com/javami/blog/item/b59e25384864e72eb8998f91.html.IP的承载和被承载功能可形象描述为：everything over IP over everything。显然，这段话的英文描述结构很匀称优美。这段优美的语句可以直接翻译为：任何东西都可以跑在IP上，IP可以跑在任何东西上。也可以贴近业界翻译为：任何

原创 天啊

不行啊，发现自己坚持不下来，貌似没有什么兴趣学计算机这个专业，这个博客改变为搜索各种各样计算机能做到的新奇事情吧，让我有点动力。。改变成就人生啊。

原创 Make file Sample

target ... : prerequisites ...             command command:make - make clean - # Makefile for items in /home/stanw/csci3550CPGMS = \recv0 \send0 \recv1 \send1

转载 glibc error

*** glibc detected *** free(): invalid pointer:*** glibc detected *** malloc(): memory corruption:*** glibc detected *** double free or corruption (out): 0x00000000005c18a0 ****** glibc detected

原创 C asci value

Control CharactersCharOctDecHexControl-KeyControl ActionNUL000^@Null characterSOH111^AStart of heading, = console interruptSTX222^BSta

原创 Part 5 Memory 1

转载 mac os terminal basic command

http://apps.hi.baidu.com/share/detail/52231366

原创 gdb

http://www.trucy.org/blog/archives/eoiae/000087.htmlpretty detailed information about gdb

原创 solve the problem showing bash-3.2

accidentally delete something i shouldn't. showing bash-3.2 without showing my own user name first in command line ls -a to check if ur .bashrc is still there if not copy from others account

原创 part 3 Cache Memory 6

3 kinds of  cache misses-compulsory misses-capacity misses-collision missesways to reduce cache miss penalty-multilevel cache-critical word first-victim cacheways to improv

原创 CA exam 1

80The difference between SCSI and PCI.The PCI bus is designed to be a parallel interface. Each device plugged in uses an IRQ or interrupt request to access the cpu and perform its function. Usua

转载 Different between 0 '0' and NULL

Null PointersThe integer constant literal 0 has different meanings depending upon the context in which it's used. In all cases, it is still an integer constant with the value0, it is just described

转载 Amdahl's law(阿姆达尔定律)

今天在翻看以前的系统级编程作业时，不经意间看到了Amdahl's law 和 The 80/20 Rule，想起了当时的一些感谢，今天写出来：　　记得当时刚看完了之后，颇有感触 ，于是找出了Adahl's law 的数学证明：Speedup(due to EnhanceMent E) = ExcuteTime(without E)/ExcuteTime(With E) = Perfor

原创 string function

http://zhwen.org/tools/clib/string/bcmp.html 原型：extern char *strcat(char *dest,char *src); 用法：#include 功能：把src所指字符串添加到dest结尾处(覆盖dest结尾处的'\0')并添加'\0'。 说明：src和dest所指内存区域不可以

转载 printf output format

转换说明及作为结果的打印输出％a                浮点数、十六进制数字和p-记数法（Ｃ９９）%A　　　　浮点数、十六进制数字和p-记法（Ｃ９９）%c　　　　一个字符　%d　　　　有符号十进制整数　%e　　　　浮点数、e-记数法%E　　　　浮点数、Ｅ-记数法%f　　　　浮点数、十进制记数法　　%g　　　　根据数值不同自动选择％f或％e．%G　　　　根

原创 part 3 Cache Memory 5

Fully associative cache structuredetailed relationships on cache address structure.Following is the different of direct map and 8-set associative Address Bit Partitioning

原创 C section 1.1 c

Hal Burch conducted an analysis over spring break of 1999 and made an amazing discovery: there are only 16 types of programming contest problems! Furthermore, the top several comprise almost 80% of th

原创 part 3 Cache Memory 4

Direct map and Set associate These words are a little bit confused.In direct map.A memory address is consist of three parts. tag(t bits), line(l bits) and word(w bits)// This address is physical

转载 GCC

http://hi.baidu.com/ywdblog/blog/item/bd97b74b92055df382025c89.htmlgcc简介Linux系统下的gcc（GNU CCompiler）是GNU推出的功能强大、性能优越的多平台编译器，是GNU的代表作品之一。gcc是可以在多种硬体平台上编译出可执行程序的超级编译器，其执行效率与一般的编译器相比平均效率要高

转载 Http, socket tcp/ip

http://www.360doc.com/content/11/0421/17/4154133_111328225.shtmlOSI has 7 layers  application,presentation,session,transportation,network,data link and physical layer.The last three is more re

原创 c programming 1

floating point exception the reason is divided by zero.after a afternoon's hard working, i get it ,so be aware of the variables that has different affect in different areas.#include#include#

转载 SA 20120205

Advertisers will drop $3.5 million for a 30-second spot during Sunday’s Super Bowl. But to get the most bang for their buck, they might want to play their ad right after the game ends—not during it.

原创 AI heuristic search 1

-A problem is defined in 5 ingredients.1. Initial state. 2.Transition model. 3.Goal test 4. Path cost 5.Solution.-What makes it hard for a computer to handle the problems is the unknown fully given

原创 杂想1

This is the sixth month i have been here. what makes me to persist in this area, enthusiasm, passionate. i want to do so. but emotion that is out of control. I'm so strongly lack of self control ,self

转载 SA 20120202

We've all heard exercise is good for your physical and mental well-being. But a good workout can actually influence the mental well-being of others, too. Because bosses who hit the gym tend to be less

原创 part 3 Cache Memory 3

Direct -Mapping Cache Organization (The transaction among cpu, cache and main memory)Memory address is consist of three parts: Tag, line and word.For example, the line is r bits, the word is w b

转载 SA 20120201

To a female orb web spider, a suitable male can look like a mate—and a meal. For these spiders, the dating game has turned into a deadly dance of evolutionary one-upsmanship.The female spider can

原创 C section 1.1 b

http://a280606790.iteye.com/blog/770314vim command /*ID:XiaoLANG:CTASK:ride*/#include#define M 6int main(){        int i;        char one[M];        char two[M];        long

原创 part 3 Cache Memory 2

-memory stall cycles= IC*(memory references per instruction*missrate)*miss penalty-program execution time= [cpu clock cycles(includes cache hits)+memory stall cycles(cache miss)]*clock cycle time

原创 2.2 Web and HTTP

- URL(universal resource locate)ex.www.someschool.edu/someDept/pic.gif(include hostname and pathname)HTTP: hypertext transfer protocolNonpersistent HTTPsuppose user enters URL:www.someScho

原创 C section 1.1 a

#include int main () {    FILE *fin  = fopen ("test.in", "r");    FILE *fout = fopen ("test.out", "w");    int a, b;    fscanf (fin, "%d %d", &a, &b);      /* the two input integers */    fprint

原创 2.7 Socket programming with TCP

socket-a host-local, application-created, OS-controlled interface (a “door”) into which application process can both send and receive messages to/from another application process.process- controlled

原创 part 3 Cache Memory 1

·Computer system overview-location-capacity-unit of transfer  cpu(word)-cache(word)-main memory(block)-disk(page)  1 byte is always 8 bits  1 word, it's just the number of bits the CPU c