Hit-under-miss&&Return stack

Hit-under-miss: When an instruction requests data from a cache, if the data is not there, ARM11 treats this as a non-blocking operation. The cache is instructed to get the missing data, then the pipeline execution can continue as long as the next instructions are not dependent on the missing data. Even if the next instruction is another data load, the ARM11 microarchitecture permits this operation if the data is in the cache (i.e. a hit-under-miss). Only if three successive data misses are encountered, will the pipeline stall

当指令需要缓存里的数据，如果数据不在缓存里，ARM11 会认为是个非阻塞操作。缓存会去获取没有命中的数据，然后流水线的执行能够继续只要吓一跳指令不依赖于没有命中的数据。即使下一条指令是加载另一个数据，ARM11 体系允许这个操作，只要数据在缓存中（这就是一个在没有命中下命中）。只有遇到连续的三次数据没有命中才会使流水线停止

Return stack

返回栈

The processor includes a three-entry return stack to accelerate returns from procedure calls. For
each procedure call, the processor pushes the return address onto a hardware stack. When the
processor recognizes a procedure return, the processor pops the address held in the return stack
that the prefetch unit uses as the predicted return address.

处理器包含了三个入口返回栈来加速程序返回。每一个程序调用，处理器将返回地址压入硬件栈，当处理器知道程序要返回时，则从返回栈中弹出地址，这是预取指令单元需要用来作为预取返回的地址