linux clk

最新推荐文章于 2021-05-22 23:49:17 发布

JDSH0224

最新推荐文章于 2021-05-22 23:49:17 发布

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分类专栏： nuc972

本文链接：https://blog.csdn.net/chenliang0224/article/details/79832290

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1. 流程图

2. 源码分析

本文以定时看门狗时钟分析，因看门狗的时钟源有四种可供选择，分别为：xin(12MHz)、xin128_div(12MHz/128)、pclk4096_div（76MHz/4096）, xin32k(32.768K)，下面逐个分析。

2.1 涉及到的结构体

固定频率的时钟结构体：

struct clk_fixed_rate {
	struct		clk_hw hw; //硬件时钟结构体，见下
	unsigned long	fixed_rate; //固定范围的时钟，如12M、32.768K
	u8		flags; //时钟标识，如12M为所有时钟的根，即该标识为CLK_IS_ROOT
};

硬件时钟结构体：

struct clk_hw {
	struct clk *clk; //时钟核心结构体
	const struct clk_init_data *init; //时钟初始化数据
};

clk结构体：

struct clk {
	const char		*name; //时钟名称
	const struct clk_ops	*ops; //时钟操作结构
	struct clk_hw		*hw; //对应时钟硬件操作
	struct clk		*parent; //时钟的父亲
	const char		**parent_names; //当前时钟的父亲名称
	struct clk		**parents;  //当前时钟有多个父时钟源
	u8			num_parents; //时钟源个数
	unsigned long		rate; //频率
	unsigned long		new_rate;
	unsigned long		flags;
	unsigned int		enable_count; 
	unsigned int		prepare_count;
	struct hlist_head	children;
	struct hlist_node	child_node;
	unsigned int		notifier_count;
#ifdef CONFIG_COMMON_CLK_DEBUG
	struct dentry		*dentry;
#endif
};

时钟初始化数据：

struct clk_init_data {
	const char		*name; //时钟名称，如“XIN”
	const struct clk_ops	*ops; //时钟的操作结构
	const char		**parent_names; //双向指针，表示是否有多个父名称
	u8			num_parents; //父名称个数
	unsigned long		flags; //标识？？？
};

时钟操作接口：

struct clk_ops {
	int		(*prepare)(struct clk_hw *hw);
	void		(*unprepare)(struct clk_hw *hw);
	int		(*is_prepared)(struct clk_hw *hw);
	void		(*unprepare_unused)(struct clk_hw *hw);
	int		(*enable)(struct clk_hw *hw);
	void		(*disable)(struct clk_hw *hw);
	int		(*is_enabled)(struct clk_hw *hw);
	void		(*disable_unused)(struct clk_hw *hw);
	unsigned long	(*recalc_rate)(struct clk_hw *hw,
					unsigned long parent_rate);
	long		(*round_rate)(struct clk_hw *hw, unsigned long,
					unsigned long *);
	int		(*set_parent)(struct clk_hw *hw, u8 index);
	u8		(*get_parent)(struct clk_hw *hw);
	int		(*set_rate)(struct clk_hw *hw, unsigned long,
				    unsigned long);
	void		(*init)(struct clk_hw *hw);
};

多路时钟源：

struct clk_mux {
	struct clk_hw	hw; //指向硬件时钟结构体
	void __iomem	*reg; //对应MCU的寄存器
	u32		*table; 
	u32		mask; //当前时钟屏蔽字,即在reg寄存器中的位宽
	u8		shift; //当前时钟在reg寄存器的偏移位置
	u8		flags; //标识
	spinlock_t	*lock;
};

使能时钟结构体：

struct clk_gate {
	struct clk_hw hw; //指向硬件时钟
	void __iomem	*reg; //使能寄存器
	u8		bit_idx; //对应reg寄存器中的使能bit位
	u8		flags; //标识
	spinlock_t	*lock;
};

时钟检索结构体：

struct clk_lookup {
	struct list_head	node;
	const char		*dev_id; //设备
	const char		*con_id;
	struct clk		*clk;
};

固定乘法器和分频时钟结构体：

struct clk_fixed_factor {
	struct clk_hw	hw; //指向硬件时钟结构体
	unsigned int	mult; //乘法器、倍频系数
	unsigned int	div; //除法器、分频系数
};

2.2 时钟初始化

四种时钟源:

static const char *wwdt_sel_clks[] = { "xin", "xin128_div", "pclk4096_div", "xin32k",};

2.2.1 看门狗初始化：

int __init nuc970_init_clocks(void)
{
	//1. xin时钟源初始化
	clk[xin] 		= nuc970_clk_fixed("xin", 12000000); //外部12MHZ晶振  
	
	//2. xin32k时钟源初始化
	clk[xin32k] 	= nuc970_clk_fixed("xin32k", 32768); //外部32.768K时钟源
	
	//3. xin128_div 时钟源初始化
	clk[xin128_div]  = nuc970_clk_fixed_factor("xin128_div", "xin", 1, 128); //12MHZ的128分频=12M/128
	
	clk[sys_mux] 	= nuc970_clk_mux("sys_mux", REG_CLK_DIV0, 3, 2, sys_sel_clks, ARRAY_SIZE(sys_sel_clks));
	clk[sys_div]	= nuc970_clk_divider("sys_div", "sys_mux", REG_CLK_DIV0, 0, 2);
	clk[ddr_gate] = nuc970_clk_gate("ddr_gate", "sys_div", REG_CLK_HCLKEN, 10);
	
	//CPU
	clk[cpu_div]  = nuc970_clk_divider("cpu_div", "sys_div", REG_CLK_DIV0, 16, 1);
	clk[cpu_gate] = nuc970_clk_gate("cpu_gate", "cpu_div", REG_CLK_HCLKEN, 0);
	// HCLK1 & PCLK
	clk[hclk1_div]  = nuc970_clk_fixed_factor("hclk1_div", "cpu_div", 1, 2);	
	clk[gdma_gate] = nuc970_clk_gate("gdma_hclk_gate", "hclk1_div", REG_CLK_HCLKEN, 12);
	clk[ebi_gate] = nuc970_clk_gate("ebi_hclk_gate", "hclk1_div", REG_CLK_HCLKEN, 9);
	clk[tic_gate] = nuc970_clk_gate("tic_hclk_gate", "hclk1_div", REG_CLK_HCLKEN, 7);
	//PCLK
	clk[pclk_div]	= nuc970_clk_divider("pclk_div", "hclk1_div", REG_CLK_DIV0, 24, 4);
	
	//4. pclk4096_div 时钟源初始化
	clk[pclk4096_div]  = nuc970_clk_fixed_factor("pclk4096_div", "pclk_div", 1, 4096); //PCLK=75M的4096分频

	
	//看门狗时钟源选择
	clk[wdt_eclk_mux] = nuc970_clk_mux("wdt_eclk_mux", REG_CLK_DIV8, 8, 2, wwdt_sel_clks, ARRAY_SIZE(wwdt_sel_clks)); //多路时钟源
	//看门狗时钟使能
	clk[wdt_eclk_gate]  = nuc970_clk_gate("wdt_eclk_gate", "wdt_eclk_mux", REG_CLK_PCLKEN0, 0); //时钟源使能
	
	//......
	
	//时钟注册
	clk_register_clkdev(clk[xin], "xin", NULL);
	clk_register_clkdev(clk[xin32k], "xin32k", NULL);
	clk_register_clkdev(clk[pclk4096_div], "pclk4096_div", NULL);
	clk_register_clkdev(clk[xin128_div], "xin128div", NULL);
	
	//看门狗时多路钟源注册
	clk_register_clkdev(clk[wdt_eclk_mux], "wdt_eclk_mux", NULL); 
	//看门狗使能注册
	clk_register_clkdev(clk[wdt_eclk_gate], "wdt_eclk", NULL); 
｝

这个函数内部涉及到的clk api比较多，为了了解它的原理，这里逐个分析......

2.2.2 XIN时钟源初始化：

//1. xin时钟源初始化
clk[xin] 		= nuc970_clk_fixed("xin", 12000000); //外部12MHZ晶振

//固定时钟源（12MHz、32.768KHz）
static inline struct clk *nuc970_clk_fixed(const char *name, int rate)
{
	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}

该API注册的时固定的时钟源，如arm外接的12MHz晶振和32.768K的时钟源。

struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		unsigned long fixed_rate)
{
	struct clk_fixed_rate *fixed;
	struct clk *clk;
	struct clk_init_data init;

	/* allocate fixed-rate clock */
	fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);
	if (!fixed) {
		pr_err("%s: could not allocate fixed clk\n", __func__);
		return ERR_PTR(-ENOMEM);
	}

	//初始化一个时钟数据
	init.name = name; //时钟名称
	init.ops = &clk_fixed_rate_ops; //时钟操作接口
	init.flags = flags | CLK_IS_BASIC; //时钟标识
	init.parent_names = (parent_name ? &parent_name: NULL); //初始化时钟的父对象名称
	init.num_parents = (parent_name ? 1 : 0); //父对象个数

	/* struct clk_fixed_rate assignments */
	fixed->fixed_rate = fixed_rate; //固定的时钟范围
	fixed->hw.init = &init; //绑定时钟初始化结构体

	/* register the clock */
	clk = clk_register(dev, &fixed->hw); //时钟注册

	if (IS_ERR(clk))
		kfree(fixed);

	return clk;
}

const struct clk_ops clk_fixed_rate_ops = {
	.recalc_rate = clk_fixed_rate_recalc_rate,
};
EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);

static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
		unsigned long parent_rate)
{
	return to_clk_fixed_rate(hw)->fixed_rate;
}

注册一个时钟，这里开始分配一个struct clk_fixed_rate结构体，然后对该结构体的成员进行初始化，最后调用clk_register()注册该时钟。

struct clk *clk_register(struct device *dev, struct clk_hw *hw)
{
	int ret;
	struct clk *clk;

	clk = kzalloc(sizeof(*clk), GFP_KERNEL); //分配一个clk时钟
	if (!clk) {
		pr_err("%s: could not allocate clk\n", __func__);
		ret = -ENOMEM;
		goto fail_out;
	}

	ret = _clk_register(dev, hw, clk);
	if (!ret)
		return clk;

	kfree(clk);
fail_out:
	return ERR_PTR(ret);
}
EXPORT_SYMBOL_GPL(clk_register);

这里主要是分配一个struct clk结构体，然后调用内核的_clk_register()函数完成注册

static int _clk_register(struct device *dev, struct clk_hw *hw, struct clk *clk)
{
	int i, ret;

	clk->name = kstrdup(hw->init->name, GFP_KERNEL); //时钟名称拷贝“XIN”
	if (!clk->name) {
		pr_err("%s: could not allocate clk->name\n", __func__);
		ret = -ENOMEM;
		goto fail_name;
	}
	//以下时绑定hw的资源
	clk->ops = hw->init->ops; //绑定时钟的操作接口
	clk->hw = hw; //指向hw
	clk->flags = hw->init->flags; //拷贝标识
	clk->num_parents = hw->init->num_parents; 

	hw->clk = clk; //互相绑定

	/* allocate local copy in case parent_names is __initdata */
	clk->parent_names = kzalloc((sizeof(char*) * clk->num_parents),
			GFP_KERNEL);

	if (!clk->parent_names) {
		pr_err("%s: could not allocate clk->parent_names\n", __func__);
		ret = -ENOMEM;
		goto fail_parent_names;
	}


	/* copy each string name in case parent_names is __initdata */
	/*动态分配父名称*/
	for (i = 0; i < clk->num_parents; i++) {
		clk->parent_names[i] = kstrdup(hw->init->parent_names[i],
						GFP_KERNEL);
		if (!clk->parent_names[i]) {
			pr_err("%s: could not copy parent_names\n", __func__);
			ret = -ENOMEM;
			goto fail_parent_names_copy;
		}
	}

	ret = __clk_init(dev, clk); //时钟初始化，核心部分
	if (!ret)
		return 0;

fail_parent_names_copy:
	while (--i >= 0)
		kfree(clk->parent_names[i]);
	kfree(clk->parent_names);
fail_parent_names:
	kfree(clk->name);
fail_name:
	return ret;
}

该函数内部主要时完成 struct clk_hw *hw和struct clk *clk结构体的相互初始化，并最终调用__clk_init()函数初始化

int __clk_init(struct device *dev, struct clk *clk)
{
	int i, ret = 0;
	struct clk *orphan;
	struct hlist_node *tmp2;

	if (!clk)
		return -EINVAL;

	clk_prepare_lock(); //获取锁

	/* check to see if a clock with this name is already registered */
	/*校验当前注册的时钟是否已经注册过了*/
	if (__clk_lookup(clk->name)) {
		pr_debug("%s: clk %s already initialized\n",
				__func__, clk->name);
		ret = -EEXIST;
		goto out;
	}

	/* check that clk_ops are sane.  See Documentation/clk.txt */
	if (clk->ops->set_rate &&
			!(clk->ops->round_rate && clk->ops->recalc_rate)) {
		pr_warning("%s: %s must implement .round_rate & .recalc_rate\n",
				__func__, clk->name);
		ret = -EINVAL;
		goto out;
	}

	if (clk->ops->set_parent && !clk->ops->get_parent) {
		pr_warning("%s: %s must implement .get_parent & .set_parent\n",
				__func__, clk->name);
		ret = -EINVAL;
		goto out;
	}

	/* throw a WARN if any entries in parent_names are NULL */
	for (i = 0; i < clk->num_parents; i++)
		WARN(!clk->parent_names[i],
				"%s: invalid NULL in %s's .parent_names\n",
				__func__, clk->name);

	/*
	 * Allocate an array of struct clk *'s to avoid unnecessary string
	 * look-ups of clk's possible parents.  This can fail for clocks passed
	 * in to clk_init during early boot; thus any access to clk->parents[]
	 * must always check for a NULL pointer and try to populate it if
	 * necessary.
	 *
	 * If clk->parents is not NULL we skip this entire block.  This allows
	 * for clock drivers to statically initialize clk->parents.
	 */

	//如果当前时钟有父时钟，就需要遍历父时钟确定是否已经注册过了
	if (clk->num_parents > 1 && !clk->parents) {
		clk->parents = kzalloc((sizeof(struct clk*) * clk->num_parents),
				GFP_KERNEL);
		/*
		 * __clk_lookup returns NULL for parents that have not been
		 * clk_init'd; thus any access to clk->parents[] must check
		 * for a NULL pointer.  We can always perform lazy lookups for
		 * missing parents later on.
		 */
		if (clk->parents)
			for (i = 0; i < clk->num_parents; i++)
				clk->parents[i] =
					__clk_lookup(clk->parent_names[i]);
	}

	clk->parent = __clk_init_parent(clk); //初始化时钟源

	/*
	 * Populate clk->parent if parent has already been __clk_init'd.  If
	 * parent has not yet been __clk_init'd then place clk in the orphan
	 * list.  If clk has set the CLK_IS_ROOT flag then place it in the root
	 * clk list.
	 *
	 * Every time a new clk is clk_init'd then we walk the list of orphan
	 * clocks and re-parent any that are children of the clock currently
	 * being clk_init'd.
	 */
	 /*根据时钟类型的不同，注册到不同的链表中*/
	if (clk->parent)
		hlist_add_head(&clk->child_node,
				&clk->parent->children);
	else if (clk->flags & CLK_IS_ROOT)
		hlist_add_head(&clk->child_node, &clk_root_list);
	else
		hlist_add_head(&clk->child_node, &clk_orphan_list);

	/*
	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
	 * simple clocks and lazy developers the default fallback is to use the
	 * parent's rate.  If a clock doesn't have a parent (or is orphaned)
	 * then rate is set to zero.
	 */
	if (clk->ops->recalc_rate) //重新计算时钟频率
		clk->rate = clk->ops->recalc_rate(clk->hw,
				__clk_get_rate(clk->parent));
	else if (clk->parent)
		clk->rate = clk->parent->rate;
	else
		clk->rate = 0;

	/*
	 * walk the list of orphan clocks and reparent any that are children of
	 * this clock
	 */
	hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
		if (orphan->ops->get_parent) {
			i = orphan->ops->get_parent(orphan->hw);
			if (!strcmp(clk->name, orphan->parent_names[i]))
				__clk_reparent(orphan, clk);
			continue;
		}

		for (i = 0; i < orphan->num_parents; i++)
			if (!strcmp(clk->name, orphan->parent_names[i])) {
				__clk_reparent(orphan, clk);
				break;
			}
	 }

	/*
	 * optional platform-specific magic
	 *
	 * The .init callback is not used by any of the basic clock types, but
	 * exists for weird hardware that must perform initialization magic.
	 * Please consider other ways of solving initialization problems before
	 * using this callback, as it's use is discouraged.
	 */
	if (clk->ops->init)
		clk->ops->init(clk->hw);

	clk_debug_register(clk);

out:
	clk_prepare_unlock();

	return ret;
}

至此，到这里就完成了一个struct clk时钟结构体的初始化。

2.2.3 XIN32时钟初始化

//2. xin32k时钟源初始化  
clk[xin32k]  = nuc970_clk_fixed("xin32k", 32768); //外部32.768K时钟源

该函数的内部流程与2.2.2一样，这里不在赘述！

2.2.4 xin128_div时钟初始化

//3. xin128_div 时钟源初始化  
clk[xin128_div]  = nuc970_clk_fixed_factor("xin128_div", "xin", 1, 128); //12MHZ的128分频=12M/128

该函数有四个参数，分别为

1>“xin128_div”： 12MHz晶振的128分频，表示当前的时钟

2> "xin" : 12MHz晶振，表示当前时钟依赖的父时钟

3> 1 : 乘法器（倍频系数）

4> 128 ：乘法器(分频系数)

static inline struct clk *nuc970_clk_fixed_factor(const char *name,
		const char *parent, unsigned int mult, unsigned int div)
{
	return clk_register_fixed_factor(NULL, name, parent,
			CLK_SET_RATE_PARENT, mult, div);
}

struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div)
{
	struct clk_fixed_factor *fix;
	struct clk_init_data init;
	struct clk *clk;

	fix = kmalloc(sizeof(*fix), GFP_KERNEL); //分配一个固定系数的时钟
	if (!fix) {
		pr_err("%s: could not allocate fixed factor clk\n", __func__);
		return ERR_PTR(-ENOMEM);
	}

	/* struct clk_fixed_factor assignments */
	fix->mult = mult; //乘法器（倍频系数）
	fix->div = div; //除法器(分频系数)
	fix->hw.init = &init; //绑定一个硬件时钟结构体

	//初始化一个硬件结构体
	init.name = name;
	init.ops = &clk_fixed_factor_ops; //绑定时钟的操作
	init.flags = flags | CLK_IS_BASIC;
	init.parent_names = &parent_name; //绑定当前时钟的父名称
	init.num_parents = 1; //个数

	clk = clk_register(dev, &fix->hw); //注册时钟，与前面分析的一样

	if (IS_ERR(clk))
		kfree(fix);

	return clk;
}

该函数内部最终也是调用clk_register()函数完成时钟的初始化，这个在前面分析过，最终返回一个clk指针，再次不在赘述！不过这里要分析下硬件时钟结构体绑定的操作接口

init.ops = &clk_fixed_factor_ops; //绑定时钟的操作

struct clk_ops clk_fixed_factor_ops = {
	.round_rate = clk_factor_round_rate, //计算倍频和分频之后的时钟
	.set_rate = clk_factor_set_rate,
	.recalc_rate = clk_factor_recalc_rate,
};
EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);

static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long *prate)
{
	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);

	if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) { //当前时钟是否依赖上一级时钟，即父时钟
		unsigned long best_parent;

		best_parent = (rate / fix->mult) * fix->div; //计算时钟

		//这个函数内部会涉及到一个嵌套过程，因为当前时钟可能时由多级时钟经过多级分频而得到
		*prate = __clk_round_rate(__clk_get_parent(hw->clk), 
				best_parent);
	}

	return (*prate / fix->div) * fix->mult; //计算分频和倍频之后的时钟
}

static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long parent_rate)
{
	return 0;
}

static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
		unsigned long parent_rate)
{
	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
	unsigned long long int rate;

	rate = (unsigned long long int)parent_rate * fix->mult;
	do_div(rate, fix->div);
	return (unsigned long)rate;
}

2.2.4 pclk4096_div时钟初始化

 //4. pclk4096_div 时钟源初始化  
 clk[pclk4096_div]  = nuc970_clk_fixed_factor("pclk4096_div", "pclk_div", 1, 4096); //PCLK=75M的4096分频

该函数的内部执行流程与2.2.3一样，这里不再分析.

2.3. 4 看门狗时钟源初始化、使能

//看门狗时钟源选择
clk[wdt_eclk_mux] = nuc970_clk_mux("wdt_eclk_mux", REG_CLK_DIV8, 8, 2, wwdt_sel_clks, ARRAY_SIZE(wwdt_sel_clks)); //多路时钟源
//看门狗时钟使能
clk[wdt_eclk_gate]  = nuc970_clk_gate("wdt_eclk_gate", "wdt_eclk_mux", REG_CLK_PCLKEN0, 0); //时钟源使能

static const char *wwdt_sel_clks[] = { "xin", "xin128_div", "pclk4096_div", "xin32k",};

下面对上面两个函数逐个分析

a. 多路时钟源初始化

clk[wdt_eclk_mux] = nuc970_clk_mux("wdt_eclk_mux", REG_CLK_DIV8, 8, 2, wwdt_sel_clks, ARRAY_SIZE(wwdt_sel_clks));

//时钟源复用
static inline struct clk *nuc970_clk_mux(const char *name, void __iomem *reg,
		u8 shift, u8 width, const char **parents, int num_parents)
{
	return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
			width, 0, &nuc970_lock);
}

函数参数分别为

1> "wdt_eclk_mux": 当前时钟的名称

2> REG_CLK_DIV8 : 当前时钟对应arm芯片内部的寄存器

3> 8: 当前时钟在寄存器REG_CLK_DIV8的偏移位置

4> 2：当前时钟在REG_CLK_DIV8中位宽

4> wwdt_sel_clks: 时钟源选择描述符

5> 时钟源描述符个数

struct clk *clk_register_mux(struct device *dev, const char *name,
		const char **parent_names, u8 num_parents, unsigned long flags,
		void __iomem *reg, u8 shift, u8 width,
		u8 clk_mux_flags, spinlock_t *lock)
{
	u32 mask = BIT(width) - 1;

	return clk_register_mux_table(dev, name, parent_names, num_parents,
				      flags, reg, shift, mask, clk_mux_flags,
				      NULL, lock);
}

struct clk *clk_register_mux_table(struct device *dev, const char *name,
		const char **parent_names, u8 num_parents, unsigned long flags,
		void __iomem *reg, u8 shift, u32 mask,
		u8 clk_mux_flags, u32 *table, spinlock_t *lock)
{
	struct clk_mux *mux;
	struct clk *clk;
	struct clk_init_data init;

	/* allocate the mux */
	mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);
	if (!mux) {
		pr_err("%s: could not allocate mux clk\n", __func__);
		return ERR_PTR(-ENOMEM);
	}

	init.name = name;
	init.ops = &clk_mux_ops; //操作接口
	init.flags = flags | CLK_IS_BASIC;
	init.parent_names = parent_names;
	init.num_parents = num_parents;

	/* struct clk_mux assignments */
	mux->reg = reg;
	mux->shift = shift;
	mux->mask = mask;
	mux->flags = clk_mux_flags;
	mux->lock = lock;
	mux->table = table;
	mux->hw.init = &init;

	clk = clk_register(dev, &mux->hw);

	if (IS_ERR(clk))
		kfree(mux);

	return clk;
}

该函数内部分配一个struct clk_mux *mux结构体，同样，最终调用clk_register()初始化时钟，前面分析过，这里不在赘述，不过对该函数的操作接口中时钟源选择需分析：

init.ops = &clk_mux_ops; //操作接口

const struct clk_ops clk_mux_ops = {
	.get_parent = clk_mux_get_parent, //获得父时钟
	.set_parent = clk_mux_set_parent, //设置父时钟
};

static u8 clk_mux_get_parent(struct clk_hw *hw)
{
	struct clk_mux *mux = to_clk_mux(hw);
	int num_parents = __clk_get_num_parents(hw->clk);
	u32 val;

	/*
	 * FIXME need a mux-specific flag to determine if val is bitwise or numeric
	 * e.g. sys_clkin_ck's clksel field is 3 bits wide, but ranges from 0x1
	 * to 0x7 (index starts at one)
	 * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
	 * val = 0x4 really means "bit 2, index starts at bit 0"
	 */
	val = readl(mux->reg) >> mux->shift;
	val &= mux->mask;

	if (mux->table) {
		int i;

		for (i = 0; i < num_parents; i++)
			if (mux->table[i] == val)
				return i;
		return -EINVAL;
	}

	if (val && (mux->flags & CLK_MUX_INDEX_BIT))
		val = ffs(val) - 1;

	if (val && (mux->flags & CLK_MUX_INDEX_ONE))
		val--;

	if (val >= num_parents)
		return -EINVAL;

	return val;
}

static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
{
	struct clk_mux *mux = to_clk_mux(hw);
	u32 val;
	unsigned long flags = 0;

	if (mux->table)
		index = mux->table[index];

	else {
		if (mux->flags & CLK_MUX_INDEX_BIT)
			index = (1 << ffs(index));

		if (mux->flags & CLK_MUX_INDEX_ONE)
			index++;
	}

	if (mux->lock)
		spin_lock_irqsave(mux->lock, flags);

	val = readl(mux->reg);
	val &= ~(mux->mask << mux->shift);
	val |= index << mux->shift;
	writel(val, mux->reg);

	if (mux->lock)
		spin_unlock_irqrestore(mux->lock, flags);

	return 0;
}

b. 看门狗使能

//看门狗时钟使能
clk[wdt_eclk_gate]  = nuc970_clk_gate("wdt_eclk_gate", "wdt_eclk_mux", REG_CLK_PCLKEN0, 0); //时钟源使能

//时钟使能标识
static inline struct clk *nuc970_clk_gate(const char *name, const char *parent,
		void __iomem *reg, u8 shift)
{
	return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
			shift, 0, &nuc970_lock);
}

函数参数分别为

1> "wdt_eclk_gate": 当前时钟的使能名称

2> "wdt_eclk_mux": 当前时钟的父对象名称

3> REG_CLK_PCLKEN0: 当前时钟的使能寄存器

4> 0: 当前时钟在REG_CLK_PCLKEN0寄存器中的使能bit位

struct clk *clk_register_gate(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		void __iomem *reg, u8 bit_idx,
		u8 clk_gate_flags, spinlock_t *lock)
{
	struct clk_gate *gate;
	struct clk *clk;
	struct clk_init_data init;

	/* allocate the gate */
	gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
	if (!gate) {
		pr_err("%s: could not allocate gated clk\n", __func__);
		return ERR_PTR(-ENOMEM);
	}

	init.name = name;
	init.ops = &clk_gate_ops; //使能门限接口
	init.flags = flags | CLK_IS_BASIC;
	init.parent_names = (parent_name ? &parent_name: NULL);
	init.num_parents = (parent_name ? 1 : 0);

	/* struct clk_gate assignments */
	gate->reg = reg;
	gate->bit_idx = bit_idx;
	gate->flags = clk_gate_flags;
	gate->lock = lock;
	gate->hw.init = &init;

	clk = clk_register(dev, &gate->hw);

	if (IS_ERR(clk))
		kfree(gate);

	return clk;
}

该函数内部分配一个struct clk_gate *gate结构体，同样，最终调用clk_register()初始化时钟，前面分析过，这里不在赘述，不过对该函数的操作接口中使能需分析：

init.ops = &clk_gate_ops; //使能接口

const struct clk_ops clk_gate_ops = {
	.enable = clk_gate_enable, //使能
	.disable = clk_gate_disable, //禁止
	.is_enabled = clk_gate_is_enabled, //是否使能
};
EXPORT_SYMBOL_GPL(clk_gate_ops);

static int clk_gate_enable(struct clk_hw *hw)
{
	clk_gate_endisable(hw, 1);

	return 0;
}

static void clk_gate_disable(struct clk_hw *hw)
{
	clk_gate_endisable(hw, 0);
}

static int clk_gate_is_enabled(struct clk_hw *hw)
{
	u32 reg;
	struct clk_gate *gate = to_clk_gate(hw);

	reg = readl(gate->reg);

	/* if a set bit disables this clk, flip it before masking */
	if (gate->flags & CLK_GATE_SET_TO_DISABLE)
		reg ^= BIT(gate->bit_idx);

	reg &= BIT(gate->bit_idx);

	return reg ? 1 : 0;
}

上面的使能和禁止最终都会调用如下接口：

static void clk_gate_endisable(struct clk_hw *hw, int enable)
{
	struct clk_gate *gate = to_clk_gate(hw);
	int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
	unsigned long flags = 0;
	u32 reg;

	set ^= enable;

	if (gate->lock)
		spin_lock_irqsave(gate->lock, flags);

	reg = readl(gate->reg); //获取寄存器

	if (set)
		reg |= BIT(gate->bit_idx); //使能
	else
		reg &= ~BIT(gate->bit_idx); //禁止

	writel(reg, gate->reg); //写寄存器

	if (gate->lock)
		spin_unlock_irqrestore(gate->lock, flags);
}

至此就完成了4个时钟源和一个看门狗时钟源复用的初始化工作，接下来将要分析注册过程...

3. 时钟注册

	//时钟注册
	clk_register_clkdev(clk[xin], "xin", NULL);
	clk_register_clkdev(clk[xin32k], "xin32k", NULL);
	clk_register_clkdev(clk[pclk4096_div], "pclk4096_div", NULL);
	clk_register_clkdev(clk[xin128_div], "xin128div", NULL);
	
	//看门狗时多路钟源注册
	clk_register_clkdev(clk[wdt_eclk_mux], "wdt_eclk_mux", NULL); 
	//看门狗使能注册
	clk_register_clkdev(clk[wdt_eclk_gate], "wdt_eclk", NULL);

可以看到时钟注册最终都是调用同一个接口，如下：

int clk_register_clkdev(struct clk *clk, const char *con_id,
	const char *dev_fmt, ...)
{
	struct clk_lookup *cl;
	va_list ap;

	if (IS_ERR(clk))
		return PTR_ERR(clk);

	va_start(ap, dev_fmt);
	cl = vclkdev_alloc(clk, con_id, dev_fmt, ap);
	va_end(ap);

	if (!cl)
		return -ENOMEM;

	clkdev_add(cl); //将上面分配的cl结构体添加到clocks链表中

	return 0;
}

void clkdev_add(struct clk_lookup *cl)
{
	mutex_lock(&clocks_mutex);
	list_add_tail(&cl->node, &clocks); //最核心的一个地方，贯穿整个时钟子系统！！！
	mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL(clkdev_add);

4. 看门狗时钟获取

	//因看门狗驱动有4个时钟源可供选择，关于时钟架构分析详见另外一篇博客
	clkmux = clk_get(NULL, "wdt_eclk_mux"); 
	if (IS_ERR(clkmux)) {
		dev_err(&pdev->dev, "failed to get watchdog clock mux\n");
		ret = PTR_ERR(clkmux);
		return ret;
	}

	//这里选择时钟源为32K的外部时钟
	clklxt = clk_get(NULL, "xin32k");
	if (IS_ERR(clklxt)) {
		dev_err(&pdev->dev, "failed to get 32k clk\n");
		ret = PTR_ERR(clklxt);
		return ret;
	}

	//设置时钟源
	clk_set_parent(clkmux, clklxt);

	nuc970_wdt->clk = clk_get(NULL, "wdt");
	if (IS_ERR(nuc970_wdt->clk)) {
		dev_err(&pdev->dev, "failed to get watchdog clock\n");
		ret = PTR_ERR(nuc970_wdt->clk);
		return ret;
	}

	//启动看门狗时钟源
	clk_prepare(nuc970_wdt->clk);
	clk_enable(nuc970_wdt->clk);


	//获取看门狗使能
	nuc970_wdt->eclk = clk_get(NULL, "wdt_eclk"); //enable
	if (IS_ERR(nuc970_wdt->eclk)) {
		dev_err(&pdev->dev, "failed to get watchdog eclock\n");
		ret = PTR_ERR(nuc970_wdt->eclk);
		return ret;
	}

	//使能看门狗
	clk_prepare(nuc970_wdt->eclk);
	clk_enable(nuc970_wdt->eclk);

我们以选择32K时钟源xin32k为例，下面逐个分析这些函数

4.1 看门狗时钟源选择

clkmux = clk_get(NULL, "wdt_eclk_mux");  //获取看门狗时钟源clk
if (IS_ERR(clkmux)) {
	dev_err(&pdev->dev, "failed to get watchdog clock mux\n");
	ret = PTR_ERR(clkmux);
	return ret;
}

struct clk *clk_get(struct device *dev, const char *con_id)
{
	const char *dev_id = dev ? dev_name(dev) : NULL;
	struct clk *clk;

	if (dev) { //为NULL，直接跳过
		clk = of_clk_get_by_name(dev->of_node, con_id);
		if (!IS_ERR(clk) && __clk_get(clk))
			return clk;
	}

	return clk_get_sys(dev_id, con_id); //见下分析
}
EXPORT_SYMBOL(clk_get);

struct clk *clk_get_sys(const char *dev_id, const char *con_id)
{
	struct clk_lookup *cl;

	mutex_lock(&clocks_mutex);
	cl = clk_find(dev_id, con_id); //根据con_id从clocks时钟链表中选择cl，见下分析
	if (cl && !__clk_get(cl->clk))
		cl = NULL;
	mutex_unlock(&clocks_mutex);

	return cl ? cl->clk : ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get_sys);

static struct clk_lookup *clk_find(const char *dev_id, const char *con_id)
{
	struct clk_lookup *p, *cl = NULL;
	int match, best_found = 0, best_possible = 0;

	if (dev_id)
		best_possible += 2;
	if (con_id)
		best_possible += 1;

	list_for_each_entry(p, &clocks, node) {
		match = 0;
		if (p->dev_id) {
			if (!dev_id || strcmp(p->dev_id, dev_id))
				continue;
			match += 2;
		}
		if (p->con_id) {
			if (!con_id || strcmp(p->con_id, con_id))
				continue;
			match += 1;
		}

        //Ѱ��ƥ���������
		if (match > best_found) {
			cl = p;
			if (match != best_possible)
				best_found = match;
			else
				break;
		}
	}
	return cl;
}

当在clocks链表中找到时钟结构体时将返回clkmux。

下面分析32K时钟源获取

//这里选择时钟源为32K的外部时钟
clklxt = clk_get(NULL, "xin32k");
if (IS_ERR(clklxt)) {
	dev_err(&pdev->dev, "failed to get 32k clk\n");
	ret = PTR_ERR(clklxt);
	return ret;
}

这里也是调用上面分析的clk_get()，既然相同就不再此赘述！上面获取了时钟源选择结构体和xin32k时钟，现在就是要设置父时钟源了

//设置时钟源
clk_set_parent(clkmux, clklxt);

int clk_set_parent(struct clk *clk, struct clk *parent)
{
	int ret = 0;
	u8 p_index = 0;
	unsigned long p_rate = 0;

	if (!clk || !clk->ops)
		return -EINVAL;

	/* verify ops for for multi-parent clks */
	if ((clk->num_parents > 1) && (!clk->ops->set_parent))
		return -ENOSYS;

	/* prevent racing with updates to the clock topology */
	clk_prepare_lock();

	if (clk->parent == parent)
		goto out;

	/* check that we are allowed to re-parent if the clock is in use */
	if ((clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) {
		ret = -EBUSY;
		goto out;
	}

	/* try finding the new parent index */
	if (parent) {
		p_index = clk_fetch_parent_index(clk, parent); //寻找匹配的时钟源
		p_rate = parent->rate;
		if (p_index == clk->num_parents) {
			pr_debug("%s: clk %s can not be parent of clk %s\n",
					__func__, parent->name, clk->name);
			ret = -EINVAL;
			goto out;
		}
	}

	/* propagate PRE_RATE_CHANGE notifications */
	if (clk->notifier_count)
		ret = __clk_speculate_rates(clk, p_rate);

	/* abort if a driver objects */
	if (ret & NOTIFY_STOP_MASK)
		goto out;

	/* do the re-parent */
	ret = __clk_set_parent(clk, parent, p_index);

	/* propagate rate recalculation accordingly */
	if (ret)
		__clk_recalc_rates(clk, ABORT_RATE_CHANGE);
	else
		__clk_recalc_rates(clk, POST_RATE_CHANGE);

out:
	clk_prepare_unlock();

	return ret;
}
EXPORT_SYMBOL_GPL(clk_set_parent);

根据当前时钟xin32k，从“wdt_eclk_mux”中选择时钟源，最后调用clk_mux_set_parent()设置选择的父时钟。

上面选择了看门狗的时钟源为“xin32K”，接下来就是如何开启该看门狗的时钟寄存器了。

4.2 使能看门狗总开关

nuc970_wdt->clk = clk_get(NULL, "wdt");
if (IS_ERR(nuc970_wdt->clk)) {
	dev_err(&pdev->dev, "failed to get watchdog clock\n");
	ret = PTR_ERR(nuc970_wdt->clk);
	return ret;
}

//使能看门狗时钟源
clk_prepare(nuc970_wdt->clk);
clk_enable(nuc970_wdt->clk);

int clk_prepare(struct clk *clk)
{
	int ret;

	clk_prepare_lock();
	ret = __clk_prepare(clk);
	clk_prepare_unlock();

	return ret;
}
EXPORT_SYMBOL_GPL(clk_prepare);

int clk_enable(struct clk *clk)
{
	unsigned long flags;
	int ret;

	flags = clk_enable_lock();
	ret = __clk_enable(clk);
	clk_enable_unlock(flags);

	return ret;
}
EXPORT_SYMBOL_GPL(clk_enable);

static int __clk_enable(struct clk *clk)
{
	int ret = 0;

	if (!clk)
		return 0;

	if (WARN_ON(clk->prepare_count == 0))
		return -ESHUTDOWN;

	if (clk->enable_count == 0) {
		ret = __clk_enable(clk->parent);

		if (ret)
			return ret;

		if (clk->ops->enable) {
			ret = clk->ops->enable(clk->hw); //调用clk_gate_enable函数
			if (ret) {
				__clk_disable(clk->parent);
				return ret;
			}
		}
	}

	clk->enable_count++;
	return 0;
}

其实，这里通过查看arm的datasheet，知道是使能看门狗寄存器的一个bit位，这里相当于看门狗的一个总开关，接下来我们将再分析看门狗的使能开关，真的是比较痛苦，不看手册根本就不知道为什么要使能这么多看门狗.....

4.3 使能看门狗内部开关

	//获取看门狗使能
	nuc970_wdt->eclk = clk_get(NULL, "wdt_eclk"); //enable
	if (IS_ERR(nuc970_wdt->eclk)) {
		dev_err(&pdev->dev, "failed to get watchdog eclock\n");
		ret = PTR_ERR(nuc970_wdt->eclk);
		return ret;
	}

	//使能看门狗
	clk_prepare(nuc970_wdt->eclk);
	clk_enable(nuc970_wdt->eclk);

5. 总结

其实看门狗架构还是比较简单的，本博客描述了看门狗的注册流程以及使用过程，准备做饭咯....

JDSH0224

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linux clk

1. 流程图2. 源码分析本文以定时看门狗时钟分析，因看门狗的时钟源有四种可供选择，分别为：xin(12MHz)、xin128_div(12MHz/128)、pclk4096_div（76MHz/4096）, xin32k(32.768K)，下面逐个分析。2.1 涉及到的结构体固定频率的时钟结构体：struct clk_fixed_rate { struct clk_hw hw; ...
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