手码-在U-boot SPL 移植新的PMIC芯片驱动

已于 2022-06-04 11:39:34 修改
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文章标签： ubuntu linux u-boot
于 2022-06-04 11:32:02 首次发布
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本文链接：https://blog.csdn.net/comestrong/article/details/125120090
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入手一块飞凌嵌入式 imx8mm开发板. 但是本人需要修改其显示分辨率, 但是飞凌嵌入式不提供其u-boot源码, 也不提供其显示驱动源码. 同时飞凌不提供安卓11镜像和源码

无奈,下载nxp官方源码, 自己找驱动源码,自行移植. 如何下载NXP源码, 如何在源码中配置uboot,参看上一篇文章.

以下为个人移植NXP官方u-boot到飞凌PCBA的过程, 如有侵犯厂家权利, 请联系删除

编译主机 Ubuntu-16.04.7-LTS, PMIC芯片为pca9450

在U-boot新增PMIC支持.

1, 新增PMIC驱动程序

A, 拷贝源码

将源码pca9450.c 拷贝到uboot-imx/drivers/power/pmic/文件夹下

~/android_build/vendor/nxp-opensource/uboot-imx/drivers/power/pmic/pca9450.c

将源码pmic_pca9450.c拷贝到uboot-imx/drivers/power/pmic/文件夹下

~/android_build/vendor/nxp-opensource/uboot-imx/drivers/power/pmic/pmic_pca9450.c

将pca9450.h头文件拷贝到/uboot-imx/include/power/文件夹

~/android_build/vendor/nxp-opensource/uboot-imx/include/power/pca9450.h

B,修改编译环境

修改Kconfig, 修改 PMIC驱动程序所在文件夹的Kconfig

~/android_build/vendor/nxp-opensource/uboot-imx/drivers/power/pmic/Kconfig

新增如下

config DM_PMIC_PCA9450

bool "Enable Driver Model for PMIC PCA9450"

depends on DM_PMIC

help

This config enables implementation of driver-model pmic uclass features

for PMIC PCA9450. The driver implements read/write operations.

修改Makefile, 修改 PMIC驱动程序所在文件夹的Makefile

~/android_build/vendor/nxp-opensource/uboot-imx/drivers/power/pmic/Makefile

新增如下

obj-$(CONFIG_$(SPL_)DM_PMIC_PCA9450) += pca9450.o

obj-$(CONFIG_POWER_PCA9450) += pmic_pca9450.o

2,修改imx8mm_evk.h

~/android_build/vendor/nxp-opensource/uboot-imx/include/configs/imx8mm_evk.h

#if 0

#define CONFIG_POWER_BD71837 //将原电源驱动程序注释掉

#else

#define CONFIG_POWER_PCA9450 //新增新电源驱动程序配置

#endif

3, 修改u-boot设备树.

~/android_build/vendor/nxp-opensource/uboot-imx/arch/arm/dts/fsl-imx8mm-ddr4-evk.dts

在fsl-imx8mm-ddr4-evk.dts中将原PMIC信息注释掉,新增PMIC pca9450.

代码改动很多,&i2c1 模块所有代码如下:

&i2c1 {
	clock-frequency = <400000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
	status = "okay";

#if 0				//原PMIC代码不编译
	pmic: bd71837@4b {
		reg = <0x4b>;
		compatible = "rohm,bd71837";
		/* PMIC BD71837 PMIC_nINT GPIO1_IO3 */
		pinctrl-0 = <&pinctrl_pmic>;
		gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;

		gpo {
			rohm,drv = <0x0C>;	/* 0b0000_1100 all gpos with cmos output mode */
		};

		regulators {
			#address-cells = <1>;
			#size-cells = <0>;

			bd71837,pmic-buck2-uses-i2c-dvs;
			bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */

			buck1_reg: regulator@0 {
				reg = <0>;
				regulator-compatible = "buck1";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <1250>;
			};

			buck2_reg: regulator@1 {
				reg = <1>;
				regulator-compatible = "buck2";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <1250>;
			};

			buck3_reg: regulator@2 {
				reg = <2>;
				regulator-compatible = "buck3";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
			};

			buck4_reg: regulator@3 {
				reg = <3>;
				regulator-compatible = "buck4";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
			};

			buck5_reg: regulator@4 {
				reg = <4>;
				regulator-compatible = "buck5";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1350000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck6_reg: regulator@5 {
				reg = <5>;
				regulator-compatible = "buck6";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck7_reg: regulator@6 {
				reg = <6>;
				regulator-compatible = "buck7";
				regulator-min-microvolt = <1605000>;
				regulator-max-microvolt = <1995000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck8_reg: regulator@7 {
				reg = <7>;
				regulator-compatible = "buck8";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1_reg: regulator@8 {
				reg = <8>;
				regulator-compatible = "ldo1";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo2_reg: regulator@9 {
				reg = <9>;
				regulator-compatible = "ldo2";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <900000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo3_reg: regulator@10 {
				reg = <10>;
				regulator-compatible = "ldo3";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4_reg: regulator@11 {
				reg = <11>;
				regulator-compatible = "ldo4";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo5_reg: regulator@12 {
				reg = <12>;
				regulator-compatible = "ldo5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			ldo6_reg: regulator@13 {
				reg = <13>;
				regulator-compatible = "ldo6";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo7_reg: regulator@14 {
				reg = <14>;
				regulator-compatible = "ldo7";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};
		};
	};
#else				//编译新的pmic设备树代码
	pmic: pca9450@25 {
		reg = <0x25>;
		compatible = "nxp,pca9450";
		/* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
		pinctrl-0 = <&pinctrl_pmic>;
		gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;

		gpo {
			nxp,drv = <0x0C>;       /* 0b0000_1100 all gpos with cmos output mode */
		};

		regulators {
			#address-cells = <1>;
			#size-cells = <0>;

			pca9450,pmic-buck2-uses-i2c-dvs;
			pca9450,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */

			buck1_reg: regulator@0 {
				reg = <0>;
				regulator-compatible = "buck1";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <2187500>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <3125>;
			};

			buck2_reg: regulator@1 {
				reg = <1>;
				regulator-compatible = "buck2";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <2187500>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <3125>;
			};

			buck3_reg: regulator@2 {
				reg = <2>;
				regulator-compatible = "buck3";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <2187500>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck4_reg: regulator@3 {
				reg = <3>;
				regulator-compatible = "buck4";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <3400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck5_reg: regulator@4 {
				reg = <4>;
				regulator-compatible = "buck5";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <3400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck6_reg: regulator@5 {
				reg = <5>;
				regulator-compatible = "buck6";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <3400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1_reg: regulator@6 {
				reg = <6>;
				regulator-compatible = "ldo1";
				regulator-min-microvolt = <1600000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo2_reg: regulator@7 {
				reg = <7>;
				regulator-compatible = "ldo2";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1150000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo3_reg: regulator@8 {
				reg = <8>;
				regulator-compatible = "ldo3";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4_reg: regulator@9 {
				reg = <9>;
				regulator-compatible = "ldo4";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo5_reg: regulator@10 {
				reg = <10>;
				regulator-compatible = "ldo5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};
		};
	};
#endif
};

4, 修改spl.c

删除原有PMIC程序, 添加pca9450的代码.

~/android_build/vendor/nxp-opensource/uboot-imx/board/freescale/imx8mm_evk/spl.c

/*
 * Copyright 2018-2019 NXP
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#if 1   //add by cym 20201120
#define CONFIG_PCA9450
#endif


#include <common.h>
#include <spl.h>
#include <asm/io.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/arch/imx8mm_pins.h>
#include <asm/arch/sys_proto.h>
#include <power/pmic.h>


#include <power/pca9450.h>

#include <asm/arch/clock.h>
#include <asm/mach-imx/gpio.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <fsl_esdhc.h>
#include <mmc.h>
#include <asm/arch/imx8m_ddr.h>

DECLARE_GLOBAL_DATA_PTR;

void spl_dram_init(void)
{
	ddr_init(&dram_timing);
}

#define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
struct i2c_pads_info i2c_pad_info1 = {
	.scl = {
		.i2c_mode = IMX8MM_PAD_I2C1_SCL_I2C1_SCL | PC,
		.gpio_mode = IMX8MM_PAD_I2C1_SCL_GPIO5_IO14 | PC,
		.gp = IMX_GPIO_NR(5, 14),
	},
	.sda = {
		.i2c_mode = IMX8MM_PAD_I2C1_SDA_I2C1_SDA | PC,
		.gpio_mode = IMX8MM_PAD_I2C1_SDA_GPIO5_IO15 | PC,
		.gp = IMX_GPIO_NR(5, 15),
	},
};

#define USDHC2_CD_GPIO	IMX_GPIO_NR(2, 18)
#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19)

#define USDHC_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \
			 PAD_CTL_FSEL2)
#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1)

static iomux_v3_cfg_t const usdhc3_pads[] = {
	IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
};

static iomux_v3_cfg_t const usdhc2_pads[] = {
	IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
	IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
};

/*
 * The evk board uses DAT3 to detect CD card plugin,
 * in u-boot we mux the pin to GPIO when doing board_mmc_getcd.
 */
static iomux_v3_cfg_t const usdhc2_cd_pad =
	IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL);

static iomux_v3_cfg_t const usdhc2_dat3_pad =
	IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 |
	MUX_PAD_CTRL(USDHC_PAD_CTRL);


static struct fsl_esdhc_cfg usdhc_cfg[2] = {
	{USDHC2_BASE_ADDR, 0, 1},
	{USDHC3_BASE_ADDR, 0, 1},
};

int board_mmc_init(bd_t *bis)
{
	int i, ret;
	/*
	 * According to the board_mmc_init() the following map is done:
	 * (U-Boot device node)    (Physical Port)
	 * mmc0                    USDHC1
	 * mmc1                    USDHC2
	 */
	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
		switch (i) {
		case 0:
			usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
			imx_iomux_v3_setup_multiple_pads(
				usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
			gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset");
			gpio_direction_output(USDHC2_PWR_GPIO, 0);
			udelay(500);
			gpio_direction_output(USDHC2_PWR_GPIO, 1);
			break;
		case 1:
			usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
			imx_iomux_v3_setup_multiple_pads(
				usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
			break;
		default:
			printf("Warning: you configured more USDHC controllers"
				"(%d) than supported by the board\n", i + 1);
			return -EINVAL;
		}

		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
		if (ret)
			return ret;
	}

	return 0;
}

int board_mmc_getcd(struct mmc *mmc)
{
	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
	int ret = 0;

	switch (cfg->esdhc_base) {
	case USDHC3_BASE_ADDR:
		ret = 1;
		break;
	case USDHC2_BASE_ADDR:
		imx_iomux_v3_setup_pad(usdhc2_cd_pad);
		gpio_request(USDHC2_CD_GPIO, "usdhc2 cd");
		gpio_direction_input(USDHC2_CD_GPIO);

		/*
		 * Since it is the DAT3 pin, this pin is pulled to
		 * low voltage if no card
		 */
		ret = gpio_get_value(USDHC2_CD_GPIO);

		imx_iomux_v3_setup_pad(usdhc2_dat3_pad);
		return ret;
	}

	return 1;
}

#ifdef CONFIG_POWER
#define I2C_PMIC	0
int power_init_board(void)
{
        struct pmic *p;
        int ret;

        ret = power_pca9450_init(I2C_PMIC);
        if (ret)
                printf("power init failed");

        p = pmic_get("PCA9450");
        pmic_probe(p);

        /* BUCKxOUT_DVS0/1 control BUCK123 output */
        pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);

        /* Buck 1 DVS control through PMIC_STBY_REQ */
        pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);

        /* decrease RESET key long push time from the default 10s to 10ms */
        /* Ton_Deb of PCA9450 is 20ms and don't change */

        /* increase VDD_SOC to typical value 0.85v before first DRAM access */
        /* pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14); */
        pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14);
        pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x10);

        /* increase VDD_DRAM to 0.975v for 3Ghz DDR -> 0.95V instead of 0.975V, */
        /* because PCA9450 Buck3 can set 0.95V */
        /* Also, set B3_ENMODE=2 (ON by PMIC_ON_REQ=H & PMIC_STBY_REQ=L) */
        pmic_reg_write(p, PCA9450_BUCK3OUT_DVS0, 0x1C);
        pmic_reg_write(p, PCA9450_BUCK3CTRL, 0x4A);

        /* set VDD_SNVS_0V8 from default 0.85V */
        pmic_reg_write(p, PCA9450_LDO2CTRL, 0xC0);

#ifndef CONFIG_IMX8M_LPDDR4
        /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
        pmic_reg_write(p, PCA9450_BUCK6OUT, 0x18);
#endif

        /* set WDOG_B_CFG to 10b=Cold Reset, except LDO1/2 */
        //pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
	pmic_reg_write(p, PCA9450_RESET_CTRL, 0x21);

        return 0;
}

#endif

void spl_board_init(void)
{
#ifndef CONFIG_SPL_USB_SDP_SUPPORT
	/* Serial download mode */
	if (is_usb_boot()) {
		puts("Back to ROM, SDP\n");
		restore_boot_params();
	}
#endif
	puts("Normal Boot\n");
}

#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
	/* Just empty function now - can't decide what to choose */
	debug("%s: %s\n", __func__, name);

	return 0;
}
#endif

void board_init_f(ulong dummy)
{
	int ret;

	/* Clear the BSS. */
	memset(__bss_start, 0, __bss_end - __bss_start);

	arch_cpu_init();

	board_early_init_f();

	timer_init();

	preloader_console_init();

	ret = spl_init();
	if (ret) {
		debug("spl_init() failed: %d\n", ret);
		hang();
	}

	enable_tzc380();

	/* Adjust pmic voltage to 1.0V for 800M */
	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);

	power_init_board();

	/* DDR initialization */
	spl_dram_init();

	board_init_r(NULL, 0);
}

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u-boot-2018.09 DTS上 I2C节点的解析
Golden_Chen的专栏
03-25 3904
这篇理下uboot上I2C总线挂载设备的整个流程。 其他总线（如SPI等）应是类同的思路。 uboot 中，以max8997挂载到s3c24xx i2c总线为例，dts里面的写法如下 aliases { i2c0 = &i2c_0; i2c1 = &i2c_1; i2c2 = &i2c_2; i2c3 = &i2c_3; }; i2c_3: i2c...
嵌入式系统移植 - uBoot : 添加关机充电(cmd_charge.c)动画
iFinelio Tower 的博客
12-21 1376
优化关机充电动画说明修改源码 说明 修改源码 diff --git a/include/configs/rk30plat.h b/include/configs/rk30plat.h index 3a25fc7..d768832 100755 --- a/include/configs/rk30plat.h +++ b/include/configs/rk30plat.h @@ -215,7 +2...
嵌入式Linux开发21——pinctrl 和 gpio 子系统
贾贾的博客
08-25 900
文章目录I.MX6ULL 的 pinctrl 子系统驱动1. pin配置信息详解2. 设备树中添加 pinctrl 节点模板GPIO子系统1.设备树中的gpio信息2.gpio子系统API函数2.1 gpio_request 函数2.2 gpio_free 函数2.3 gpio_direction_input 函数2.4 gpio_direction_output 函数2.5 gpio_get_value 函数2.6 gpio_set_value 函数   我们先来回顾一下上一篇博客是怎么初始化 LE
s5pv210 u-boot移植教程
07-07
s5pv210 u-boot移植教程涵盖了u-boot移植的整个流程，包括程序流程分析、移植u-boot-spl、支持串口、DECLARE_GLOBAL_DATA_PTR、加载Uboot到RAM、Uboot重定位、移植网卡DM9000A驱动等内容，为读者提供了一个系统的u-...
u-boot-sunxi-with-spl-vga.bin
10-19
u-boot-sunxi-with-spl-vga
基于AM335x的U-Boot/SPL的CCS调试
08-29
在基于Linux的AM335x软件开发过程中，U-Boot/SPL的移植与调试是初始阶段的关键步骤。U-Boot/SPL是Bootloader的重要组成部分，它的主要任务是为Linux内核的启动做好前期准备工作。在AM335x芯片上，启动流程包括ROM ...
U-boot移植
11-18
U-boot移植方法 基于u-boot-2015-10
SPL06-001气压计和LIS3DH加速度计的IIC驱动
05-16
SPL06-001气压计和LIS3DH加速度计的IIC驱动。IIC是hal库的IO模拟，亲测可用。不是完整工程，复制粘贴就可用。有详细注释。 SPL06好多人都说精度是0.05m，但数据手册上说的相对精度是0.5米，绝对精度接近10米。 通过...
uboot移植使用说明（含SPL）.pdf
09-27
SPL，即Second Program Loader，是2010年之后才出现的一个模块，它是U-Boot第一阶段执行的代码，主要负责搬移U-Boot第二阶段的代码到内存中运行。SPL是由固化在内部的ROM引导的。很对芯片厂商固化的ROM支持从nandflash，SDCARD等外部介质启动。所谓启动，就是从这些外部介质中搬移一段固定的大小的代码到内部RAM中运行。这里搬移的就是SPL。当SPL本身被搬移到内部RAM中运行时，它会从nandflash，SDCARD等外部介质中搬移U-Boot第二阶段的代码到外部内存中。
Uboot pmic调试
weixin_41028621的博客
11-30 1218
记录uboot pmic 调试命令 调试方法：   pmic 设备挂载在i2c bus上，从设备地址为0x68。 1.i2c 调试命令： i2c bus //查看系统有几个bus i2c dev 4 //挂载i2c bus4 i2c probe //查看当前bus上有多少slave device 2.pmic 调试命令： pmic list //list pmic devices pmic...
U-Boot移植总结
C语言是最好的编程语言
09-13 4081
SQ210平台系统移植之uboot移植 背景介绍： Uboot是当前嵌入式应用中使用最广的bootloader之一，尤其是嵌入式linux平台一般均会选用uboot作为bootloader工具，因此学习uboot的移植具有实际工作意义。 Uboot为开源项目，源码网站为：ftp://ftp.denx.de/pub/u-boot/。移植时可以从官方网站选取一个版本下载，然后以此为基础进行移植工
U-boot(七):U-boot移植
最新发布
tyro_wzp的博客
11-30 973
网卡芯片CS引脚(片选信号),210每个SROM bank对应选信号CSn(n=0-5),210的DM9000接在CSn1(SROM bank1),DM9000总线地址基地址是0x88000000。210的SROM控制器是8/16bit接口,实际使用16位接口,网线有8根,4根都是GND,发送2根（Tx-,Tx+),接收2根(Rx+,Rx-)DM9000的CMD引脚接210的ADDR2引脚,数据线和地址线复用,CMD为高电平传输DATA,低电平传输INDEX(偏移地址)
高通--PMIC修改（三）
weixin_43453149的博客
12-03 3020
前面的两篇PMIC相关的文章大概讲解了之前遇到的问题，目前又遇到PMIC相关的问题，又与之前的不一样，因此再做一次补充
驱动概念（uboot命令）
m0_64837135的博客
03-28 927
驱动就是计算机程序访问硬件的一个接口（API），这个接口是操作系统提供，作为操作系统涉及到安全管理机制，应用层不能够直接访问硬件，需要通过驱动函数接口来访问硬件 系统启动过程 上电--》uboot--》加载内核(kernel)--》挂载根文件系统(FS)--》执行应用程序 ...
U-BOOT移植过程详解: SPL
liuxin_john的专栏
01-21 8550
申明   本着学习交流的原则, 将个人移植u-boot的过程做一个记录. 文章参考了csdn blog里面的很多内容, 有的已经记不得出处了, 只好把当时的摘要直接贴出来. 如果冒犯, 还请见谅. 如有侵权, 请与我邮件联系. 谢谢! SPL SPL是uboot第一阶段执行的代码. 主要负责搬移uboot第二阶段的代码到内存中运行. SPL是由固化在芯片内部的ROM引导的. 我们知道
Armv8架构UBOOT 启动篇——SPL（u-boot-spl.lds链接脚本）
XingYu.Liao的博客
05-02 4991
背景 UBOOT版本：2016 架构：Armv8 Cortex A53 DEMO板：freescale ls1043ardb 引言 从uboot 2011版本之后便引入了SPL架构，将之前所有secondary program loader相关的代码实现进行规范，这样也使得各类单板的相关代码实现可以复用，也有效的避免了重复代码和符号链接问题。众所周知，对于不同类型的CPU以及其对应的不同...
U-BOOT移植过程详解: u-boot.bin
liuxin_john的专栏
01-28 5787
申明   本着学习交流的原则, 将个人移植u-boot的过程做一个记录. 文章参考了csdn blog里面的很多内容, 有的已经记不得出处了, 只好把当时的摘要直接贴出来. 如果冒犯, 还请见谅. 如有侵权, 请与我邮件联系. 谢谢! u-boot.bin 这里的u-boot.bin指的是不包含SPL的stage2部分的代码. 它会被SPL搬移到RAM的某个地址处开始运行.

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