reset release issue

design requirement:

  when system reset occur, but POR not occur, change to 1.

  Or the register is cleared.

 

FF connection:

     async reset  ~sys_rst_n & por_rst_n

     D : 1'b1

     clk : clk

    q    : sys_rst_occur

 

Issues:

sys_rst_n and por_rst_n are not synced to clk.

when sys_rst_n de-asserted (por_rst_n has been de-asserted), sys_rst_occur need to change from 0 to 1, the value of it maybe unknown.

 

Solution:

Use double sync instead of a single FF.

So the output sys_rst_occur is a stable value when sys_rst_n de-asserted, and solved the metastability issue.