imx6ull 3 之仿stm32驱动开发

一、

  • 对于stm32而言,用一个结构体将所有外设的寄存器放到一起

二、修改驱动
1、添加清除bss段的代码
2、添加寄存器结构体(nxp官方也有写好的此类库提供给我们)
一定要注意地址的连续性,地址不连续的寄存器要添加填充位
三、源码

start.s

  1 .global _start    // .global 伪操作,定义一个全局标号
  2 .global _bss_start
  3 _bss_start:
  4     .word __bss_start // 表示 _bss_start 的值为  __bss_start,这里  __bss_start不能直接用
  5 
  6 .global _bss_end
  7 _bss_end:
  8     .word __bss_end
  9 
 10 _start:
 11 	//设置处理器进入svc模式
 12     mrs r0,cpsr
 13     bic r0,r0,#0x1f
 14     orr r0,r0,#0x13
 15     msr cpsr,r0
 16 
 17     //清除bss段
 18     ldr r0,_bss_start
 19     ldr r1,_bss_end
 20     mov r2,#0 //ldr 中的立即数用 =  , 而move中的立即数用 # 号
 21 bss_loop:
 22     stmia r0!,{r2} //将r2的值写入 r0中存放的那个地址,然后r0中存放的地址值加1
 23     cmp r0,r1
 24     ble bss_loop    // 这里是b 和 le的组合,le表示比较的结果小于等于,就跳转
 25 
 26     ldr sp,=0x80200000
 27 
 28     b main

makefile

  1 objs = start.o main.o
  2 ledc.bin : $(objs)
  3     arm-linux-gnueabihf-ld -Timx6u.lds -o ledc.elf $^
  4     arm-linux-gnueabihf-objcopy -O binary -S ledc.elf $@
  5     arm-linux-gnueabihf-objdump -D -m arm ledc.elf > ledc.dis
  6 
  7 %.o : %.s
  8     arm-linux-gnueabihf-gcc -Wall -nostdlib -c $< -o $@ 
  9 
 10 %.o : %.c
 11     arm-linux-gnueabihf-gcc -Wall -nostdlib -c $< -o $@ 
 12 
 13 .PHONY:clean
 14 clean:
 15     rm -rf *.o *.dis *.elf *.imx *.bin

main.h

  1 
  2 
  3 
  4 
  5 typedef struct
  6 {
  7     volatile unsigned int CCR;
  8     volatile unsigned int CCDR;
  9     volatile unsigned int CSR;
 10     volatile unsigned int CCSR;
 11     volatile unsigned int CACRR;
 12     volatile unsigned int CBCDR;
 13     volatile unsigned int CBCMR;
 14     volatile unsigned int CSCMR1;
 15     volatile unsigned int CSCMR2;
 16     volatile unsigned int CSCDR1;
 17     volatile unsigned int CS1CDR;
 18     volatile unsigned int CS2CDR;
 19     volatile unsigned int CDCDR;
 20     volatile unsigned int CHSCCDR;
 21     volatile unsigned int CSCDR2;
 22     volatile unsigned int CSCDR3;
 23     volatile unsigned int RESERVED_1[2];
 24     volatile unsigned int CDHIPR;
 25     volatile unsigned int RESERVED_2[2];
 26     volatile unsigned int CLPCR;
 27     volatile unsigned int CISR;
 28     volatile unsigned int CIMR;
 29     volatile unsigned int CCOSR;
 30     volatile unsigned int CGPR;
 31     volatile unsigned int CCGR0;
 32     volatile unsigned int CCGR1;
 33     volatile unsigned int CCGR2;
 34     volatile unsigned int CCGR3;
 35     volatile unsigned int CCGR4;
 36     volatile unsigned int CCGR5;
 37     volatile unsigned int CCGR6;
 38     volatile unsigned int RESERVED_3[1];
 39     volatile unsigned int CMEOR;
 40 }CCM_Type;
 41 
 42 
 43 typedef struct
 44 {
 45     volatile unsigned int PLL_ARM;
 46     volatile unsigned int PLL_ARM_SET;
 47     volatile unsigned int PLL_ARM_CLR;
 48     volatile unsigned int PLL_ARM_TOG;
 49     volatile unsigned int PLL_USB1;
 50     volatile unsigned int PLL_USB1_SET;
 51     volatile unsigned int PLL_USB1_CLR;
 52     volatile unsigned int PLL_USB1_TOG;
 53     volatile unsigned int PLL_USB2;
 54     volatile unsigned int PLL_USB2_SET;
 55     volatile unsigned int PLL_USB2_CLR;
 56     volatile unsigned int PLL_USB2_TOG;
 57     volatile unsigned int PLL_SYS;
 58     volatile unsigned int PLL_SYS_SET;
 59     volatile unsigned int PLL_SYS_CLR;
 60     volatile unsigned int PLL_SYS_TOG;
 61     volatile unsigned int PLL_SYS_SS;
 62     volatile unsigned int RESERVED_1[3];
 63     volatile unsigned int PLL_SYS_NUM;
 64     volatile unsigned int RESERVED_2[3];
 65     volatile unsigned int PLL_SYS_DENOM;
 66     volatile unsigned int RESERVED_3[3];
 67     volatile unsigned int PLL_AUDIO;
 68     volatile unsigned int PLL_AUDIO_SET;
 69     volatile unsigned int PLL_AUDIO_CLR;
 70     volatile unsigned int PLL_AUDIO_TOG;
 71     volatile unsigned int PLL_AUDIO_DENOM;
 72     volatile unsigned int RESERVED_4[3];
 73     volatile unsigned int PLL_VIDEO;
 74     volatile unsigned int PLL_VIDEO_SET;
 75     volatile unsigned int PLL_VIDEO_CLR;
 76     volatile unsigned int PLL_VIDEO_TOG;
 77     volatile unsigned int PLL_VIDEO_NUM;
 78     volatile unsigned int RESERVED_5[3];
 79     volatile unsigned int PLL_VIDEO_DENOM;
 80     volatile unsigned int RESERVED_6[7];
 81     volatile unsigned int PLL_ENET;
 82     volatile unsigned int PLL_ENET_SET;
 83     volatile unsigned int PLL_ENET_CLR;
 84     volatile unsigned int PLL_ENET_TOG;
 85     volatile unsigned int PFD_480;
 86     volatile unsigned int PFD_480_SET;
 87     volatile unsigned int PFD_480_CLR;
 88     volatile unsigned int PFD_480_TOG;
 89     volatile unsigned int PFD_528;
 90     volatile unsigned int PFD_528_SET;
 91     volatile unsigned int PFD_528_CLR;
 92     volatile unsigned int PFD_528_TOG;
 93     volatile unsigned int RESERVED_7[16];
 94     volatile unsigned int MISC0;
 95     volatile unsigned int MISC0_SET;
 96     volatile unsigned int MISC0_CLR;
 97     volatile unsigned int MISC0_TOG;
 98     volatile unsigned int MISC1;
 99     volatile unsigned int MISC1_SET;
100     volatile unsigned int MISC1_CLR;
101     volatile unsigned int MISC1_TOG;
102     volatile unsigned int MISC2;
103     volatile unsigned int MISC2_SET;
。
。
。
423 #define CCM_BASE                    (0X020C4000)
424 #define CCM_ANALOG_BASE             (0X020C8000)
425 #define IOMUX_SW_MUX_BASE           (0X020E0044)
426 #define IOMUX_SW_PAD_BASE           (0X020E0204)
427 #define GPIO1_BASE                  (0x0209C000)
428 #define GPIO2_BASE                  (0x020A0000)
429 #define GPIO3_BASE                  (0x020A4000)
430 #define GPIO4_BASE                  (0x020A8000)
431 #define GPIO5_BASE                  (0x020AC000)
432 
433 
434 #define CCM                 ((CCM_Type *)CCM_BASE)
435 #define CCM_ANALOG          ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
436 #define IOMUX_SW_MUX        ((IOMUX_SW_MUX_Type *)IOMUX_SW_MUX_BASE)
437 #define IOMUX_SW_PAD        ((IOMUX_SW_PAD_Type *)IOMUX_SW_PAD_BASE)
438 #define GPIO1               ((GPIO_Type *)GPIO1_BASE)
439 #define GPIO2               ((GPIO_Type *)GPIO2_BASE)
440 #define GPIO3               ((GPIO_Type *)GPIO3_BASE)
441 #define GPIO4               ((GPIO_Type *)GPIO4_BASE)
442 #define GPIO5               ((GPIO_Type *)GPIO5_BASE)

main.c

 #include"imx6u.h"
  2 
  3 void clk_en()
  4 {
  5     CCM->CCGR0 = 0xffffffff;
  6     CCM->CCGR1 = 0xffffffff;
  7     CCM->CCGR2 = 0xffffffff;
  8     CCM->CCGR3 = 0xffffffff;
  9     CCM->CCGR4 = 0xffffffff;
 10     CCM->CCGR5 = 0xffffffff;
 11     CCM->CCGR6 = 0xffffffff;
 12 }
 13 
 14 void led_init()
 15 {
 16     IOMUX_SW_MUX->GPIO1_IO03 = 0x5;
 17     IOMUX_SW_PAD->GPIO1_IO03 = 0x10b0;
 18     GPIO1->GDIR = 0x8;
 19     GPIO1->DR &= (~(1<<3));
 20 }
 21 
 22 void led_on()
 23 {
 24     GPIO1->DR &= (~(1<<3));
 25 }
 26 
 27 void led_off()
 28 {
 29     GPIO1->DR |= (1<<3);
 30 }
 31 
 32 void delay_short(int cnt)
 33 {
 34     while(cnt--);
 35 }
 36 
 37 void delay_ms(int cnt)
 38 {
 39     while(cnt--)
 40     {
 41         delay_short(0x7ff);
 42     }
 43 }
 44 
 45 int main()
 46 {
 47     clk_en();
 48     led_init();
 49     while(1)
 50     {
 51         led_on();
 52         delay_ms(500);
 53         led_off();
 54         delay_ms(500);
 55     }
 56 }

四、补充

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