TI C6478 的UART 使用例程，向上位机发送、接收

//-----------------------------------------------------------------------------
// \file    main.c
// \brief   implementation of main() to test bsl drivers.
#include "stdio.h"
#include "types.h"

#include "evmomapl138.h"
#include "evmomapl138_timer.h"
#include "evmomapl138_i2c.h"

#include "test_uart.h"

#include "types.h"

// Public Function Prototypes

uint32_t TEST_uart(void);

//-----------------------------------------------------------------------------

// \file    test_uart.c

// \brief   implementation of OMAP-L138 uart test.

#include "stdio.h"

#include "types.h"

#include "evmomapl138.h"

#include "evmomapl138_timer.h"

#include "evmomapl138_uart.h"

#include "test_uart.h"

//----------------------------------------------------------------------------

// Private Defines and Macros

// Static Variable Declarations

// Private Function Prototypes

static uint32_t terminal_counting(void);

//-----------------------------------------------------------------------------

// Public Function Definitions

// \brief   tests the us timer and uart. counts to 1...10, printing messages

//          out the debug port along the way.

//

// \param   none.

//

// \return  uint32_t

//-----------------------------------------------------------------------------

uint32_t TEST_uart(void)

{

   uint32_t rtn;

   // initialize the required bsl modules.

   rtn = UART_init(DEBUG_PORT, 115200);

   if (rtn != ERR_NO_ERROR)

   {

      printf("error initializing uart!\r\n");

      return (rtn);

   }

   // print to a terminal...must have EVM connected to a PC.

   rtn = terminal_counting();

   return (rtn);

}

//-----------------------------------------------------------------------------

// Private Function Definitions

//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------

// counts/prints 0 to 10 to the debug port

// designed to be run with an RS-232 cable connecting the EVM to a

// PC with a terminal program open to view output.

//-----------------------------------------------------------------------------

uint32_t terminal_counting(void)

{

   uint32_t rtn;

   uint8_t rcv_data = 1;

   //***********************q**test*************************

   UART_txString(DEBUG_PORT, "\n\rPls input any keys, 'q' is exit!\t");

   UART_txString(DEBUG_PORT, "\r\n");   

   do

   {

    rtn = UART_rxByte(DEBUG_PORT, &rcv_data);

if(rtn == ERR_NO_ERROR)

{

if(rcv_data == 'q')

rcv_data = 0;

else

UART_txByte(DEBUG_PORT, rcv_data);

}

   }while(rcv_data);

  UART_txString(DEBUG_PORT, "\r\n"); 

   UART_txString(DEBUG_PORT, "\n\rtest OK!\t");

   UART_txString(DEBUG_PORT, "\r\n");

  return (rtn);

}

// Private Defines and Macros
// uncomment this define if running without gel initialization.

// Static Variable Declarations
// Private Function Prototypes
// Public Function Definitions
// \brief   entry point for bsl test code.
int main(void)
{
   uint32_t results = 0;

   EVMOMAPL138_init();

   EVMOMAPL138_initRAM();

 

//-----------------------------------------------------------------------------

// \brief   initializes psc, pll, and pinmuxes.

// \param   none.

// \return  uint32_t

//    ERR_NO_ERROR - everything is ok...cpu ready to use.

//    ERR_INIT_FAIL - something happened during initialization.

uint32_t EVMOMAPL138_init(void)

{

   uint32_t rtn = 0;

   // configure power, sysconifg, and clocks.

   rtn = init_psc();

   rtn |= init_clocks();

//-----------------------------------------------------------------------------

// helper function to initialize power and sleep config module.

//-----------------------------------------------------------------------------

uint32_t init_psc(void)

{

   //-----------------------------------------

   // PSC0, domain 0 - all modules, always on.

   //-----------------------------------------

   // configure the next state for psc0 modules.

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_EMIFA, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_SPI0, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_MMCSD0, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_AINTC, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_UART0, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_SCR0, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_SCR1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_SCR2, PSC_ENABLE);

   //-----------------------------------------

   // PSC1, domain 0 - all modules, always on.

   //-----------------------------------------

   // configure the next state for psc1 modules.

   

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_USB0, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_USB1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_GPIO, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_HPI, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_EMAC, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCASP0, PSC_ENABLE);

//    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SATA, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_VPIF, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SPI1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_I2C1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_UART1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_UART2, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP0, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_LCDC, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_PWM, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MMCSD1, PSC_ENABLE);

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_RPI, PSC_ENABLE);

//    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_ECAP, PSC_ENABLE);

//    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SCR8, PSC_ENABLE);

//    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SCR7, PSC_ENABLE);

//    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SCR12, PSC_ENABLE);

//    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SHRAM, PSC_ENABLE);

   return (ERR_NO_ERROR);

}

//-----------------------------------------------------------------------------

// helper function to initialize cpu, system, and pheripheral clocks.

// configure arm and dsp to 300 MHz and emif to 133MHz.

//-----------------------------------------------------------------------------

uint32_t init_clocks(void)

{

   uint32_t rtn;

   // unlock the system config registers.

   SYSCONFIG->KICKR[0] = KICK0R_UNLOCK;

   SYSCONFIG->KICKR[1] = KICK1R_UNLOCK;

   rtn = config_pll0(0,24,1,0,1,2,5);

   rtn |= config_pll1(24,1,0,1,2);

   // enable 4.5 divider PLL and set it as the EMIFA clock source.

//    SETBIT(SYSCONFIG->CFGCHIP[3], DIV4P5ENA | EMA_CLKSRC);

   return (rtn);

}

   if (rtn)

      return (ERR_INIT_FAIL);

   else

      return (ERR_NO_ERROR);

}

//-----------------------------------------------------------------------------

// \brief   initializes ram on EMIFB.

//

// \param   none.

//

// \return  uint32_t

//    ERR_NO_ERROR - everything is ok...ram ready to use.

//    ERR_INIT_FAIL - something happened during initialization.

//-----------------------------------------------------------------------------

uint32_t EVMOMAPL138_initRAM(void)

{

   uint32_t rtn = 0;

   // unlock the system config registers and set the ddr 2x clock source.

   SYSCONFIG->KICKR[0] = KICK0R_UNLOCK;

   SYSCONFIG->KICKR[1] = KICK1R_UNLOCK;

   CLRBIT(SYSCONFIG->CFGCHIP[3], CLK2XSRC);

   // enable emif3a clock.

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_EMIF3A, PSC_ENABLE);

   

   // check if vtp calibration is enabled.

   if (CHKBIT(VTPIO_CTL, 0x00000040))

   {

      // vtp cal disabled, begin cal.

      // enable input buffer and vtp.

      SETBIT(VTPIO_CTL, 0x00004000);

      CLRBIT(VTPIO_CTL, 0x00000040);

      // pulse clrz to init vtp cal.

      SETBIT(VTPIO_CTL, 0x00002000);

      CLRBIT(VTPIO_CTL, 0x00002000);

      SETBIT(VTPIO_CTL, 0x00002000);

    

      // poll ready bit to wait for cal to complete.

      while (!CHKBIT(VTPIO_CTL, 0x00008000)) {}

     

      // set lock and power save bits.

      SETBIT(VTPIO_CTL, 0x00000180);

   }

   // config ddr timing.

   DDR->DDRPHYCTL1 = 0x000000C4;

   DDR->SDCR = 0x0893C622;

   DDR->SDCR &= ((DDR->SDCR & 0xFF0FFFFF) | 0x00800000);

   DDR->SDCR = ((DDR->SDCR & 0xFF0FFFFF) | 0x02000000);

   DDR->SDCR &= (~0x00008000);

   

   DDR->SDTIMR1 = 0x20923A89;

   DDR->SDTIMR2 = 0x0015C720;

   DDR->SDCR2 = 0x0;

   DDR->SDRCR = 0x00000492;

   

   // set ddr2 to sync reset.

   SETBIT(DDR->SDRCR, 0xC0000000);

   

   // sync reset the ddr clock.

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_EMIF3A, PSC_SYNCRESET);

   

   // enable the clock.

   EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_EMIF3A, PSC_ENABLE);

   

   // disable self refresh.

   CLRBIT(DDR->SDRCR, 0xC0000000);

   if (rtn)

      return (ERR_INIT_FAIL);

   else

      return (ERR_NO_ERROR);

}

//-----------------------------------------------------------------------------

// \brief   releases the dsp core from reset.

//

// \param   none.

//

// \return  none.

//-----------------------------------------------------------------------------

void EVMOMAPL138_enableDsp(void)

{

   // power dsp core.

   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_DSP, PSC_ENABLE);

   // wake up dsp core and release from reset.

   SETBIT(PSC0->MDCTL[LPSC_DSP], LRST);

}

 // init the us timer and i2c for all to use.

   USTIMER_init();

   // TEST UART DRIVER
   results += TEST_uart();
}