中断读取数,写之前一直在datasheet中找不出是什么触发中断,后来发现,数据转换完成后就触发中断。所以对相应的中断进行初始化后,打开ad转换,就可以了。
相关的register:adccon:set ad channal,转换频率(prescaler value),prescaler enable,
addcon【0】 enable ad conversion;
adcdatax :对应的data in it
adcclrint: clear interrupt ad
然后就是相关的vic的一些register了,对应的初始化就行了;
参考代码:
#include "gpio.h"
#include "adcts.h"
#include "uart.h"
#include "intc.h"
#include "system.h"
// adccon
u8 flag = 0;
void IntClearAdd(void);
void AdIntInit(void);
u32 ReadData(void);
void ClearAdInt(void);
void AdInit(u32 freq)
{
u32 TEMP;
SYSC_GetClkInform();
TEMP = g_PCLK/freq -1;
ADCTS->rADCCON = (1<<14)|(TEMP<<6);
AdIntInit();
return ;
}
void __irq AdInt()
{
flag = 1;
//ReadData();
ClearAdInt();
IntClearAdd();
}
void AdIntInit()
{
ClearAdInt();
IntClearAdd();
IntVectAd(63,(u32)AdInt);
IntEnable(63);
}
void ClearAdInt()
{
ADCTS->rADCCLRINT = 0X1;
}
void StartAd()
{
ADCTS->rADCCON |= 0X1;
}
//判断是否已经转换好
u32 ReadData(void)
{
//ADCTS->rADCCON |= 0x1; //start ADC
//while (ADCTS->rADCCON & 0x1); //check if Enable_start is low
//while (!(ADCTS->rADCCON & 0x8000)); //check if EC(End of Conversion) flag is high
return ( (int)ADCTS->rADCDAT0 & 0x3ff );
}
void OutRead(u32 x)
{
u8 TEMP;
TEMP = (u8)x/1000;
Sendchar(TEMP);
x = x%1000;
TEMP = (u8)x/100;
Sendchar(TEMP);
x %= 100;
TEMP = (u8)x/10;
Sendchar(TEMP);
x = (u8)x%10;
Sendchar(x);
}
void delay(int times)
{
int i;
for(;times>0;times--)
for(i=0;i<3000;i++);
}
int main()
{
u32 temp;
SYSTEM_EnableVIC();
SYSTEM_EnableIRQ();
UartInit();
BaudInit(9600);
AdInit(2500000);
Sendchar('r');
do{
StartAd();
while(flag == 0);
temp = ReadData();
OutRead(temp);
delay(8000);
} while(Getchar() != 'o');
}
intc.h
/**************************************************************************************
*
* Project Name : S3C6410 Validation
*
* Copyright 2006 by Samsung Electronics, Inc.
* All rights reserved.
*
* Project Description :
* This software is only for validating functions of the S3C6410.
* Anybody can use this software without our permission.
*
*--------------------------------------------------------------------------------------
*
* File Name : intc.h
*
* File Description : This file declares prototypes of interrupt controller API funcions.
*
* Author : Haksoo,Kim
* Dept. : AP Development Team
* Created Date : 2006/11/08
* Version : 0.1
*
* History
* - Created(Haksoo,Kim 2006/11/08)
* - Added Software Interrupt API function (wonjoon.jang 2007/01/18)
* - Added Interrupt Source for 6410 (2008/02/28)
*
**************************************************************************************/
#ifndef __INTC_H__
#define __INTC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "library.h"
#include "def.h"
// VIC0
#define rVIC0IRQSTATUS (VIC0_BASE + 0x00)
#define rVIC0FIQSTATUS (VIC0_BASE + 0x04)
#define rVIC0RAWINTR (VIC0_BASE + 0x08)
#define rVIC0INTSELECT (VIC0_BASE + 0x0c)
#define rVIC0INTENABLE (VIC0_BASE + 0x10)
#define rVIC0INTENCLEAR (VIC0_BASE + 0x14)
#define rVIC0SOFTINT (VIC0_BASE + 0x18)
#define rVIC0SOFTINTCLEAR (VIC0_BASE + 0x1c)
#define rVIC0PROTECTION (VIC0_BASE + 0x20)
#define rVIC0SWPRIORITYMASK (VIC0_BASE + 0x24)
#define rVIC0PRIORITYDAISY (VIC0_BASE + 0x28)
#define rVIC0VECTADDR (VIC0_BASE + 0x100)
#define rVIC0VECPRIORITY (VIC0_BASE + 0x200)
#define rVIC0ADDR (VIC0_BASE + 0xf00)
#define rVIC0PERID0 (VIC0_BASE + 0xfe0)
#define rVIC0PERID1 (VIC0_BASE + 0xfe4)
#define rVIC0PERID2 (VIC0_BASE + 0xfe8)
#define rVIC0PERID3 (VIC0_BASE + 0xfec)
#define rVIC0PCELLID0 (VIC0_BASE + 0xff0)
#define rVIC0PCELLID1 (VIC0_BASE + 0xff4)
#define rVIC0PCELLID2 (VIC0_BASE + 0xff8)
#define rVIC0PCELLID3 (VIC0_BASE + 0xffc)
#define rVIC1IRQSTATUS (VIC1_BASE + 0x00)
#define rVIC1FIQSTATUS (VIC1_BASE + 0x04)
#define rVIC1RAWINTR (VIC1_BASE + 0x08)
#define rVIC1INTSELECT (VIC1_BASE + 0x0c)
#define rVIC1INTENABLE (VIC1_BASE + 0x10)
#define rVIC1INTENCLEAR (VIC1_BASE + 0x14)
#define rVIC1SOFTINT (VIC1_BASE + 0x18)
#define rVIC1SOFTINTCLEAR (VIC1_BASE + 0x1c)
#define rVIC1PROTECTION (VIC1_BASE + 0x20)
#define rVIC1SWPRIORITYMASK (VIC1_BASE + 0x24)
#define rVIC1PRIORITYDAISY (VIC1_BASE + 0x28)
#define rVIC1VECTADDR (VIC1_BASE + 0x100)
#define rVIC1VECPRIORITY (VIC1_BASE + 0x200)
#define rVIC1ADDR (VIC1_BASE + 0xf00)
#define rVIC1PERID0 (VIC1_BASE + 0xfe0)
#define rVIC1PERID1 (VIC1_BASE + 0xfe4)
#define rVIC1PERID2 (VIC1_BASE + 0xfe8)
#define rVIC1PERID3 (VIC1_BASE + 0xfec)
#define rVIC1PCELLID0 (VIC1_BASE + 0xff0)
#define rVIC1PCELLID1 (VIC1_BASE + 0xff4)
#define rVIC1PCELLID2 (VIC1_BASE + 0xff8)
#define rVIC1PCELLID3 (VIC1_BASE + 0xffc)
#endif
void IntEnable(u32 intNum)
{
u32 temp;
if(intNum<32)
{
temp = Inp32(rVIC0INTENABLE);
temp |= (1<<intNum);
Outp32(rVIC0INTENABLE, temp);
}
else
{
temp = Inp32(rVIC1INTENABLE);
temp |= (1<<(intNum-32));
Outp32(rVIC1INTENABLE, temp);
}
}
void IntVectAd(u32 intNum, u32 handler)
{
if(intNum<32) //VIC0
{
Outp32(rVIC0VECTADDR+4*intNum, (unsigned)handler);
}
else //VIC1
{
Outp32(rVIC1VECTADDR+4*(intNum-32), (unsigned)handler);
}
}
void IntClearAdd()
{
Outp32(rVIC0ADDR, 0);
Outp32(rVIC1ADDR, 0);
}