ARM cores 家族成员表

转载，原始链接：http://en.wikipedia.org/wiki/ARM_architecture

ARM cores

ARM provides a nice summary of the numerous vendors who implement ARM cores in their design (see the 2003 Line Card). KEIL also provides a somewhat newer nice summary of vendors of ARM based processors.

Family	Architecture Version	Core	Feature	Cache (I/D)/MMU	Typical MIPS @ MHz	In application
ARM1	ARMv1 (obsolete)	ARM1		None		ARM Evaluation System second processor for BBC Micro
ARM2	ARMv2 (obsolete)	ARM2	Architecture 2 added the MUL (multiply) instruction	None	4 MIPS @ 8 MHz 0.33 DMIPS/MHz	Acorn Archimedes, Chessmachine
	ARMv2a (obsolete)	ARM250	Integrated MEMC (MMU), Graphics and IO processor. Architecture 2a added the SWP and SWPB (swap) instructions.	None, MEMC1a	7 MIPS @ 12 MHz	Acorn Archimedes
ARM3	ARMv2a (obsolete)	ARM2a	First use of a processor cache on the ARM.	4K unified	12 MIPS @ 25 MHz 0.50 DMIPS/MHz	Acorn Archimedes
ARM6	ARMv3 (obsolete)	ARM60	v3 architecture first to support addressing 32 bits of memory (as opposed to 26 bits)	None	10 MIPS @ 12 MHz	3DO Interactive Multiplayer, Zarlink GPS Receiver
		ARM600	As ARM60, cache and coprocessor bus (for FPA10 floating-point unit).	4K unified	28 MIPS @ 33 MHz
		ARM610	As ARM60, cache, no coprocessor bus.	4K unified	17 MIPS @ 20 MHz 0.65 DMIPS/MHz	Acorn Risc PC 600, Apple Newton 100 series
ARM7	ARMv3 (obsolete)	ARM700		8 KB unified	40 MHz	Acorn Risc PC prototype CPU card
		ARM710	As ARM700	8 KB unified	40 MHz	Acorn Risc PC 700
		ARM710a	As ARM700	8 KB unified	40 MHz 0.68 DMIPS/MHz	Acorn Risc PC 700, Apple eMate 300
		ARM7100	As ARM710a, integrated SoC.	8 KB unified	18 MHz	Psion Series 5
		ARM7500	As ARM710a, integrated SoC.	4 KB unified	40 MHz	Acorn A7000
		ARM7500FE	As ARM7500, "FE" Added FPA and EDO memory controller.	4 KB unified	56 MHz 0.73 DMIPS/MHz	Acorn A7000+
ARM7TDMI	ARMv4T	ARM7TDMI(-S)	3-stage pipeline, Thumb	none	15 MIPS @ 16.8 MHz 63 DMIPS @ 70 MHz	Game Boy Advance, Nintendo DS, iPod, Lego NXT, Atmel AT91SAM7, Juice Box, NXP Semiconductors LPC2000 and LH754xx
		ARM710T	As ARM7TDMI, cache	8 KB unified, MMU	36 MIPS @ 40 MHz	Psion Series 5mx, Psion Revo/Revo Plus/Diamond Mako
		ARM720T	As ARM7TDMI, cache	8 KB unified, MMU with Fast Context Switch Extension	60 MIPS @ 59.8 MHz	Zipit Wireless Messenger, NXP Semiconductors LH7952x
		ARM740T	As ARM7TDMI, cache	MPU
	ARMv5TEJ	ARM7EJ-S	5-stage pipeline, Thumb, Jazelle DBX, Enhanced DSP instructions	none
StrongARM	ARMv4	SA-110		16 KB/16 KB, MMU	203 MHz 1.0 DMIPS/MHz	Apple Newton 2x00 series, Acorn Risc PC, Rebel/Corel Netwinder, Chalice CATS, Psion Netbook
		SA-1110	As SA-110, integrated SoC	16 KB/16 KB, MMU	233 MHz	LART (computer), Intel Assabet, Ipaq H36x0, Balloon2, Zaurus SL-5x00, HP Jornada 7xx, Jornada 560 series, Palm Zire 31
ARM8	ARMv4	ARM810[10]	5-stage pipeline, static branch prediction, double-bandwidth memory	8 KB unified, MMU	84 MIPS @ 72 MHz 1.16 DMIPS/MHz	Acorn Risc PC prototype CPU card
ARM9TDMI	ARMv4T	ARM9TDMI	5-stage pipeline, Thumb	none
		ARM920T	As ARM9TDMI, cache	16 KB/16 KB, MMU with FCSE (Fast Context Switch Extension)[11]	200 MIPS @ 180 MHz	Armadillo, Atmel AT91SAM9, GP32,GP2X (first core), Tapwave Zodiac (Motorola i. MX1), Hewlet Packard HP-49/50 Calculators, Sun SPOT, Cirrus Logic EP9302, EP9307, EP9312, EP9315, Samsung S3C2442 (HTC TyTN, FIC Neo FreeRunner[12]), Samsung S3C2410 (TomTom navigation devices)[13]
		ARM922T	As ARM9TDMI, caches	8 KB/8 KB, MMU		NXP Semiconductors LH7A40x
		ARM940T	As ARM9TDMI, caches	4 KB/4 KB, MPU		GP2X (second core), Meizu M6 Mini Player[14][15]
ARM9E	ARMv5TE	ARM946E-S	Thumb, Enhanced DSP instructions, caches	variable, tightly coupled memories, MPU		Nintendo DS, Nokia N-Gage, Canon PowerShot A470, Conexant 802.11 chips, Samsung S5L2010
		ARM966E-S	Thumb, Enhanced DSP instructions	no cache, TCMs		ST Micro STR91xF, includes Ethernet[16]
		ARM968E-S	As ARM966E-S	no cache, TCMs		NXP Semiconductors LPC2900
	ARMv5TEJ	ARM926EJ-S	Thumb, Jazelle DBX, Enhanced DSP instructions	variable, TCMs, MMU	220 MIPS @ 200 MHz,	Mobile phones: Sony Ericsson (K, W series); Siemens and Benq (x65 series and newer); Texas Instruments OMAP1710, OMAP1610, OMAP1611, OMAP1612, OMAP-L137, OMAP-L138; Qualcomm MSM6100, MSM6125, MSM6225, MSM6245, MSM6250, MSM6255A, MSM6260, MSM6275, MSM6280, MSM6300, MSM6500, MSM6800; Freescale i.MX21, i.MX27, Atmel AT91SAM9, NXP Semiconductors LPC3000, GPH Wiz, Marvell Feroceon (ex.: SheevaPlug), NEC C10046F5-211-PN2-A SoC – undocumented core in the ATi Hollywood graphics chip used in the Wii,[17] Samsung S3C2412 used in Squeezebox Duet's Controller. NeoMagic MiMagic Family MM6, MM6+, MM8, MTV; Buffalo TeraStation Live (NAS); Telechips TCC7801, TCC7901;ZiiLABS' ZMS-05 system on a chip.
	ARMv5TE	ARM996HS	Clockless processor, as ARM966E-S	no caches, TCMs, MPU
ARM10E	ARMv5TE	ARM1020E	6-stage pipeline, Thumb, Enhanced DSP instructions, (VFP)	32 KB/32 KB, MMU
		ARM1022E	As ARM1020E	16 KB/16 KB, MMU
	ARMv5TEJ	ARM1026EJ-S	Thumb, Jazelle DBX, Enhanced DSP instructions, (VFP)	variable, MMU or MPU		Western Digital MyBook II World Edition
XScale	ARMv5TE	80200/IOP310/IOP315	I/O Processor, Thumb, Enhanced DSP instructions
		80219			400/600 MHz	Thecus N2100
		IOP321			600 BogoMips @ 600 MHz	Iyonix
		IOP33x
		IOP34x	1–2 core, RAID Acceleration	32K/32K L1, 512K L2, MMU
		PXA210/PXA250	Applications processor, 7-stage pipeline		PXA210: 133 and 200 MHz, PXA250: 200, 300, and 400 MHz	Zaurus SL-5600, iPAQ H3900, Sony CLIÉ NX60, NX70V, NZ90
		PXA255		32KB/32KB, MMU	400 BogoMips @ 400 MHz; 371–533 MIPS @ 400 MHz[18]	Gumstix basix & connex, Palm Tungsten E2, Zaurus SL-C860, Mentor Ranger & Stryder, iRex ILiad
		PXA263			200, 300 and 400 MHz	Sony CLIÉ NX73V, NX80V
		PXA26x			default 400 MHz, up to 624 MHz	Palm Tungsten T3
		PXA27x	Applications processor	32 KB/32 KB, MMU	800 MIPS @ 624 MHz	Gumstix verdex,"Trizeps-Modules" PXA270 COM, HTC Universal, HP hx4700, Zaurus SL-C1000, 3000, 3100, 3200, Dell Axim x30, x50, and x51 series, Motorola Q, Balloon3, Trolltech Greenphone, Palm TX, Motorola Ezx Platform A728, A780, A910, A1200, E680, E680i, E680g, E690, E895, Rokr E2, Rokr E6, Fujitsu Siemens LOOX N560, Toshiba Portégé G500, Trēo 650-755p, Zipit Z2
		PXA800(E)F
		PXA3XX (codenamed "Monahans")		32KB/32KB L1, TCM, MMU	1000 MIPS @ 1.25 GHz	Samsung Omnia
		PXA900				Blackberry 8700, Blackberry Pearl (8100)
		IXC1100	Control Plane Processor
		IXP2400/IXP2800
		IXP2850
		IXP2325/IXP2350
		IXP42x				NSLU2 IXP460/IXP465
ARM11	ARMv6	ARM1136J(F)-S[19]	8-stage pipeline, SIMD, Thumb, Jazelle DBX, (VFP), Enhanced DSP instructions	variable, MMU	740 @ 532–665 MHz (i.MX31 SoC), 400–528 MHz	Texas Instruments OMAP2420 (Nokia E90, Nokia N93, Nokia N95, Nokia N82), Zune, BUGbase[1], Nokia N800, Nokia N810, Qualcomm MSM7200 (with integrated ARM926EJ-S Coprocessor@274 MHz, used in Eten Glofiish, HTC TyTN II, HTC Nike), Freescale i.MX31 (used in the original Zune 30gb and Toshiba Gigabeat S), Freescale MXC300-30 (Nokia E63, Nokia E71, Nokia 5800, Nokia E51, Nokia E75, Nokia N97, Nokia N81), Qualcomm MSM7201A as seen in the HTC Dream, HTC Magic, Motorola Z6, HTC Hero, & Samsung SGH-i627 (Propel Pro)
	ARMv6T2	ARM1156T2(F)-S	9-stage pipeline, SIMD, Thumb-2, (VFP), Enhanced DSP instructions	variable, MPU
	ARMv6KZ	ARM1176JZ(F)-S	As ARM1136EJ(F)-S	variable, MMU+TrustZone		Apple iPhone, Apple iPod touch, Conexant CX2427X, Motorola RIZR Z8, Motorola RIZR Z10, NVIDIA GoForce 6100[20]; Telechips TCC9101, TCC9201, TCC8900, Fujitsu MB86H60, Samsung S3C6410, S3C6430[21]
	ARMv6K	ARM11 MPCore	As ARM1136EJ(F)-S, 1–4 core SMP	variable, MMU		Nvidia APX 2500
Cortex	ARMv7-A	Cortex-A5	VFP, NEON, Jazelle RCT and DBX, Thumb-2, 8-stage pipeline, 1–4 core SMP	variable (L1), MMU+TrustZone	up to 1500 (1.5 DMIPS/MHz)	"Sparrow" (ARM code name)[22][23][24]
		Cortex-A8	VFP, NEON, Jazelle RCT, Thumb-2, 13-stage superscalar pipeline	variable (L1+L2), MMU+TrustZone	up to 2000 (2.0 DMIPS/MHz in speed from 600 MHz to greater than 1 GHz)	Texas Instruments OMAP3xxx series, SBM7000, Oregon State University OSWALD, Gumstix Overo Earth, Pandora, Apple iPod touch (3rd Generation), Archos 5, FreeScale i.MX51-SOC, BeagleBoard, Apple iPhone 3GS, Motorola Droid, Palm Pre, Samsung i8910, Sony Ericsson Satio, Touch Book, Nokia N900, ZiiLABS ZMS-08 system on a chip.
		Cortex-A9	Application profile, (VFP), (NEON), Jazelle RCT and DBX, Thumb-2, Out-of-order speculative issue superscalar	MMU+TrustZone	2.5 DMIPS/MHz
		Cortex-A9 MPCore	As Cortex-A9, 1–4 core SMP	MMU+TrustZone	2.5 DMIPS/MHz (per core)	Texas Instruments OMAP4430/4440, ST-Ericsson U8500, Nvidia Tegra2
	ARMv7-R	Cortex-R4(F)	Embedded profile, Thumb-2, (FPU)	variable cache, MPU optional	600 DMIPS @ 475 MHz	Broadcom is a user, TMS570 from Texas Instruments
	ARMv7-M	Cortex-M3	Microcontroller profile, Thumb-2 only. Hardware divide instruction.	no cache, MPU optional.	125 DMIPS @ 100 MHz	Energy Micro's EFM32, Texas Instruments Stellaris microcontroller family, ST Microelectronics STM32, NXP Semiconductors LPC1700, Toshiba TMPM330FDFG, Ember's EM300 Series, Atmel AT91SAM3, Europe Technologies EasyBCU
	ARMv6-M	Cortex-M0 (codenamed "Swift")[25]	Microcontroller profile, Thumb-2 subset (16-bit Thumb instructions & BL, MRS, MSR, ISB, DSB, and DMB).	No cache.	0.9 DMIPS/MHz	NXP Semiconductors NXP LPC1100[26], Triad Semiconductor [27], Melfas[28], Chungbuk Technopark [29], Nuvoton [30], austriamicrosystems [31]
		Cortex-M1	FPGA targeted, Microcontroller profile, Thumb-2 subset (16-bit Thumb instructions & BL, MRS, MSR, ISB, DSB, and DMB).	None, tightly coupled memory optional.	Up to 136 DMIPS @ 170 MHz[32] (0.8 DMIPS/MHz,[33] MHz achievable FPGA-dependent)	Actel ProASIC3, ProASIC3L, IGLOO and Fusion PSC devices, Altera Cyclone III, other FPGA products are also supported e.g. Synplicity [34]
Family	Architecture Version	Core	Feature	Cache (I/D)/MMU	Typical MIPS @ MHz	In application