在DDR memory 初始化的地方遇到一个问题
从nandflash 读取数据到memory, 再把memory中的数据dump出来之后,输出总是 低4位总是FFFF,如下所示:
初步判断是DDR controller初始化不多,后来对比了DDR register 发现 DDR Control Register 07 (DDR_CTL_07) 的bit8有问题。
应该是1的,用来enable half datapath feature的
Bit 8 REDUC
Enable the half datapath feature of the controller.
从nandflash 读取数据到memory, 再把memory中的数据dump出来之后,输出总是 低4位总是FFFF,如下所示:
Setting DDR registers
Remap RAM
Wait on RAM
Wait DLL locks RAM
Remove remap RAM
Done
Reading OS...
BlockAddress = 00000080
*block = 0100FFFF 0200FFFF 0300FFFF 0400FFFF 0500FFFF 0600FFFF 0700FFFF 0800FFFF
BlockAddress = 00000081
*block = 0900FFFF 0A00FFFF 0B00FFFF 0C00FFFF 0D00FFFF 0E00FFFF 0F00FFFF 1000FFFF
BlockAddress = 00000082
*block = 1100FFFF 1200FFFF 1300FFFF 1400FFFF 1500FFFF 1600FFFF 1700FFFF 1800FFFF
BlockAddress = 00000083
*block = 1900FFFF 1A00FFFF 1B00FFFF 1C00FFFF 1D00FFFF 1E00FFFF 1F00FFFF 2000FFFF
BlockAddress = 00000084
*block = 2100FFFF 2200FFFF 2300FFFF 2400FFFF 2500FFFF 2600FFFF 2700FFFF 2800FFFF
BlockAddress = 00000085
*block = 2900FFFF 2A00FFFF 2B00FFFF 2C00FFFF 2D00FFFF 2E00FFFF 2F00FFFF 3000FFFF
BlockAddress = 00000086
*block = 3100FFFF 3200FFFF 3300FFFF 3400FFFF 3500FFFF 3600FFFF 3700FFFF 3800FFFF
BlockAddress = 00000087
*block = 3900FFFF 3A00FFFF 3B00FFFF 3C00FFFF 3D00FFFF 3E00FFFF 3F00FFFF 4000FFFF
初步判断是DDR controller初始化不多,后来对比了DDR register 发现 DDR Control Register 07 (DDR_CTL_07) 的bit8有问题。
应该是1的,用来enable half datapath feature的
Bit 8 REDUC
Enable the half datapath feature of the controller.