MEMORY系列之“DDR with ECC”

ECC是“Error Checking and Correcting”的简写,中文名称是“错误检查和纠正“。ECC是一种能够实现“错误检查和纠正“的技术，ECC内存就是应用了这种技术的内存，一般多应用在服务器及工作站上，这将使整个电脑系统在工作时更趋于安全稳定。

带ECC功能的DDR连接如下图所示：

 

不带ECC的32bit数据带宽连接方式如下：

不带ECC的64bit数据带宽连接方式如下：

以下是带ECC的连接方式，主要分为以下几种：

1、Using x16 Component

 

 

When using a x16 component for ECC, the lower byte lane (DQ[7:0]) must beused for the ECC bits. DDR4 memory is capable of per-DRAM addressability(PDA), and this function is used during the DDR4 device initialization sequencefor VREFDQ calibration. PDA is enabled by DQ0, so the lower byte lane must beused and connected to the controller.

The unused upper byte lane should be terminated asfollows:

• DQ[15:8] can be left floating (ODT will terminate to VDDQ)

• UDM_n/UDBI_n should be terminated to VDDQ (allows DM or DBI to beenabled)

• UDQS_t should be terminated to VDDQ

• UDQS_c should be terminated to VSSQ

2、Using x8 Component

 

 

Using an additional x8 component for ECC results inslightly lower power and will use slightly less board space than a x16component. In addition, there is no unused byte lane to terminate. But, matching the address configuration ofthe x16 data components begins with a x8 ECC component of the same density asthe x16, with half of the bank groups disabled.

Half of the bank groups are disabled by tying BG1to VSSQ. This enables command/address parity. Because the unused BG1 input onthe x16 devices is treated as a zero, the parity generated by both the x16 andthe x8 devices will be the same.

 

3、Using DDR4 x16 DDP

 

The DDR4 standard includes a special configurationfor a x16 dual die package (DDP). This device contains two x8 die connected asa single rank. Although more expensive than two discrete x8 DDR4 packages, theDDP occupies considerably less board area. This makes it an excellent optionwhere higher density is needed, but board space is constrained. Because the DDPuses x8 die, BG1 is required on the x16 DDP package. (A second ZQ is alsorequired on the board; for suggestions on designing a board that accepts bothstandard x16 DDR4 and DDP x16 DDR4 devices, see TN-40-40: DDR4 Point-to-PointDesign Guide.)

When adding ECC to a data bus using x16 DDPdevices, the most economic choice is to use an additional discrete x8 componentfor the ECC device. No special connections are needed, as all devices use BG1,and all DQ signals (byte lanes) are used.

 

As the tables show, using x16 data components witha x8 component for ECC results in the lowest power and the least board area.Using a x16 component for ECC simplifies the BOM (and thus the procurementprocess) at the cost of small increases in power and board area, plus a slightadded complexity in terminating an unused byte lane.

The x16 DDP provides the same density and power asusing all x8 components, but at the same component area as the standard x16with the x8 ECC component. Thus, you get twice the density in the same boardarea.