Linux下Matlab+CUDA双显卡环境搭建（核显+独显）

最新推荐文章于 2024-07-25 18:13:24 发布

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lnyy510

最新推荐文章于 2024-07-25 18:13:24 发布

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分类专栏： Matlab ubuntu cuda

本文链接：https://blog.csdn.net/lnyy510/article/details/81628063

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本文详细介绍了在Linux系统中如何搭建Matlab+CUDA的双显卡环境，包括使用Intel核显作为桌面显示，Nvidia独显用于Matlab计算。通过安装系统、Nvidia驱动、CUDA和Matlab，以及解决动态库和显卡模块加载问题，最终实现双显卡协同工作的目标。

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Linux下Matlab+CUDA双显卡环境搭建（核显+独显）

最近在疯狂爱上Matlab，没办法爱折腾。皇天不负有心人，还是被本大神搞出来了，羡慕吧，嫉妒吧，反正我也看不见。（附上战果图）
这里写图片描述
硬件环境：神舟战神K610D

00:00.0 Host bridge: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller (rev 06) 
00:01.0 PCI bridge: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor PCI Express x16 Controller (rev 06) 
00:02.0 VGA compatible controller: Intel Corporation 4th Gen Core Processor Integrated Graphics Controller (rev 06) 
00:03.0 Audio device: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor HD Audio Controller (rev 06) 
00:14.0 USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB xHCI (rev 05) 
00:16.0 Communication controller: Intel Corporation 8 Series/C220 Series Chipset Family MEI Controller #1 (rev 04) 
00:1a.0 USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #2 (rev 05) 
00:1b.0 Audio device: Intel Corporation 8 Series/C220 Series Chipset High Definition Audio Controller (rev 05) 
00:1c.0 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #1 (rev d5) 
00:1c.1 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #2 (rev d5) 
00:1c.2 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #3 (rev d5) 
00:1c.3 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #4 (rev d5) 
00:1d.0 USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #1 (rev 05) 
00:1f.0 ISA bridge: Intel Corporation HM86 Express LPC Controller (rev 05) 
00:1f.2 SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port SATA Controller 1 [AHCI mode] (rev 05) 
00:1f.3 SM