一、OV7725的PCLK的改变和以下几个寄存器有关:
1:OX0D(COM4);
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0X0D COM4 41 common control 4
Bit[7:6]: PLL frequency control
00:Bypass PLL
01:PLL 4X
10:PLL 6X
11:PLL 8X
Bit[5:4]: AEC evaluate windows
00: Full windows
01: 1/2 windows
10: 1/4 windows
11: Low 2/3 windows
Bit[3:0]: Reserved
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2:0X11(CLKRC);
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0X11 CLKRC 80 internal Clock