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HDLbits
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Exams/review2015 fancytimer
通过之前五个小题的学习,这道题应该不难写出,把这五个小题组合起来即可。代码如下module top_module ( input clk, input reset, // Synchronous reset input data, output [3:0] count, output counting, output done, input ack ); reg[3:0] state,next_state; wi原创 2021-11-07 01:53:19 · 403 阅读 · 0 评论 -
Verilog HDLbits:Exams/2013 q2bfsm(有限元状态机)
题目Consider a finite state machine that is used to control some type of motor. The FSM has inputs x and y, which come from the motor, and produces outputs f and g, which control the motor. There is also a clock input called clk and a reset input called res原创 2021-11-02 23:17:25 · 769 阅读 · 0 评论 -
Verilog HDLbits:Exams/2012 q2b(独热码状态机)
独热码是一种二进制编码方式,它的特点是,用来编码这个数的N位bit中,有且只有一位是1,其余位全部为0。 因为只有1位是1,所以叫做one-hot (对应的,还有一种编码方式是只有1位是0,其余位都是1,叫做one-cold)。这种编码方式保证只有一根线处于高电平状态,出现误码的概率也最低。缺点是占用的资源较多。题目Assume that a one-hot code is used with the state assignment y[5:0] = 000001(A), 000010(B), 0原创 2021-11-02 18:31:45 · 693 阅读 · 0 评论 -
Verilog HDLbits:Lemmings4(Moore型有限元状态机)
题目Although Lemmings can walk, fall, and dig, Lemmings aren’t invulnerable. If a Lemming falls for too long then hits the ground, it can splatter. In particular, if a Lemming falls for more than 20 clock cycles then hits the ground, it will splatter and ce原创 2021-10-26 15:29:29 · 842 阅读 · 0 评论 -
Verilog HDLbits:Lemmings3(Moore型有限元状态机)
题目In addition to walking left and right, Lemmings will fall (and presumably go “aaah!”) if the ground disappears underneath them.In addition to walking left and right and changing direction when bumped, when ground=0, the Lemming will fall and say “aaah!原创 2021-10-26 00:01:47 · 238 阅读 · 3 评论