话不多说直接上代码,思路在后面.
`timescale 1ps/1ps
module LED(
input clk,
input rst_n,
output reg led0
);
parameter delay0 = 50;//50
parameter delay1 = 999;//999
parameter delay2 = 999;//999
reg [31:0] cnt0,cnt1,cnt2;
parameter idle = 4'b0001,
s0 = 4'b0010,
s1 = 4'b0100,
s2 = 4'b1000;
reg flag;
reg [3:0] cur_state, next_state;
//对现态进行赋值
always @(posedge clk) begin
if (!rst_n)
cur_state = idle;
else
cur_state = next_state;
end
//对次态进行赋值
always @(*) begin
if (!rst_n) begin
next_state = idle;
end
else
case (cur_state)
idle:begin
next_state = s0;
end
s0:begin
if(cnt0 == delay0 && cnt1 == delay1 && cnt2 == delay2)
next_state = idle;
else if(cnt0 == delay0 &