hierarchical sequence简单代码理解

hierarchical sequence简单代码理解

class bus_trans extends uvm_sequence_item;
rand bit write;
rand int data[];
rand int length;
rand int addr;
rand int delay;
static int id_num;
constraint cstr{
data.size()==length;
foreach(data[i]) soft data[i]==i;
soft addr=='h100;
soft write==1;
delay inside{[1；5]};
}
`uvm_object_utils(bus_trans)   //注册bus_trans

`uvm_object_utils_begin(bus_trans)  //域的自动化
`uvm_field_int(write,UVM_ALL_ON)
`uvm_field_array_int(data,UVM_ALL_ON) //动态数组域的自动化要加array
`uvm_field_int(length,UVM_ALL_ON)
`uvm_field_int(addr,UVM_ALL_ON)
`uvm_field_int(delay,UVM_ALL_ON)
`uvm_object_utils_end

function new(string name="bus_trans");  //new函数
super.new(string name);
endfunction
endclass

class flat_seq extends uvm_sequence; 
rand int length;
rand int addr;
`uvm_object_utils(flat_seq)

`uvm_object_utils_begin(flat_seq)
`uvm_field_int(length,UVM_ALL_ON)
`uvm_field_int(addr,UVM_ALL_ON)
`uvm_object_utils_end

function new(string name="flat_seq");
super.new(string name);
endfunction

task body();
bus_trans temp;
temp=new();
temp.randomize() with{
length==local::length;   //通过task body()来传递flat_sequence里的length和addr，
                         //进而改变嵌套里面的bus_tranns的length和addr
addr==local::addr:
};
temp.print();
endtask
endclass

 class hier_seq extends uvm_sequence;
`uvm_object_utils(hier_seq)
function new(string name="hier_seq");
super.new(name);
endfunction

task body();
bus_trans t1,t2;  //嵌套两个sequence_item和sequence
flat_seq s1,s2;
`uvm_do_with(t1,{length==2;})  //`uvm_do_with实现创建，随机化和传递三个作用
fork
`uvm_do_with(s1,{length==5};)
`uvm_do_with(s2,{length==8};)
join
`uvm_do_with(t2,{length==3};)
endtask
endclass