ADF5355的VERILOG接口代码

   
参照这个图就可以写出VERILOG代码：

 

这里用的简单直接的列举所有时序边缘的写法，非常简单，根本不用动脑。代码看上去是多了点但是执行效率没有影响。

module tb ;
reg clk  = 0 , rst =  1 ;
always#5 clk <= ~clk;
reg write= 0 ;
reg [31:0] din =0;
wire busy ;



task wr_adf5355 ;
input [31:0] v ;
begin 
din = v;
@(posedge clk) ;
while(busy)@(posedge clk) ;
write=1;@(posedge clk) ;
write=0;@(posedge clk) ;
end 
endtask

initial begin 

$dumpfile ("aaa.vcd");
$dumpvars (0 ); 

#100 rst = 0;
wr_adf5355(  32'h55_55_55_55 );
wr_adf5355(  32'h0);
#1000
$finish ;


end 





adf5355_if  adf5355_if (
.clk(clk) ,
.rst(rst) ,
.din(din ) ,
.busy(busy) ,
.write(write ) ,
.adf5355_clk(adf5355_clk),
.adf5355_dat(adf5355_dat),
.adf5355_le(adf5355_le)
);

endmodule 

/*

adf5355_if  adf5355_if (
.clk(clk) ,
.rst(rst) ,
.din(din ) ,
.busy(busy) ,
.write(write ) ,
.adf5355_clk(adf5355_clk),
.adf5355_dat(adf5355_dat),
.adf5355_le(adf5355_le)
);

*/

module adf5355_if (
input clk ,rst ,
input [31:0] din ,
output reg busy ,
input write ,
output reg  adf5355_clk,adf5355_dat,adf5355_le
);
reg [7:0]  st ;
reg [31:0] r32 ;always @ (posedge clk ) if (write)r32<=din ;


always @ (posedge clk)  busy <= (st!=0) ;

reg[7:0] str;always @ (posedge clk) str<=st;

wire st_move = str!=st ;
reg [15:0]  d ;
always @ (posedge clk) if (st_move) d<=0; else d<=d+1;


always @ (posedge clk) if (rst) st<=0; else case (st)
0:if (write)st<=10;
10:    begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[31]} ;     if (d==2)  st<=100; end

100:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[31]} ;     if (d==2)  st<=st+1; end
101:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[30]} ;     if (d==2)  st<=st+1; end


102:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[30]} ;     if (d==2)  st<=st+1; end
103:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[29]} ;     if (d==2)  st<=st+1; end


104:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[29]} ;     if (d==2)  st<=st+1; end
105:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[28]} ;     if (d==2)  st<=st+1; end


106:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[28]} ;     if (d==2)  st<=st+1; end
107:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[27]} ;     if (d==2)  st<=st+1; end


108:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[27]} ;     if (d==2)  st<=st+1; end
109:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[26]} ;     if (d==2)  st<=st+1; end

110:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[26]} ;     if (d==2)  st<=st+1; end
111:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[25]} ;     if (d==2)  st<=st+1; end

112:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[25]} ;     if (d==2)  st<=st+1; end
113:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[24]} ;     if (d==2)  st<=st+1; end

114:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[24]} ;     if (d==2)  st<=st+1; end
115:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[23]} ;     if (d==2)  st<=st+1; end

116:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[23]} ;     if (d==2)  st<=st+1; end
117:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[22]} ;     if (d==2)  st<=st+1; end

118:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[22]} ;     if (d==2)  st<=st+1; end
119:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[21]} ;     if (d==2)  st<=st+1; end

120:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[21]} ;     if (d==2)  st<=st+1; end
121:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[20]} ;     if (d==2)  st<=st+1; end

122:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[20]} ;     if (d==2)  st<=st+1; end
123:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[19]} ;     if (d==2)  st<=st+1; end

124:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[19]} ;     if (d==2)  st<=st+1; end
125:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[18]} ;     if (d==2)  st<=st+1; end

126:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[18]} ;     if (d==2)  st<=st+1; end
127:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[17]} ;     if (d==2)  st<=st+1; end

128:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[17]} ;     if (d==2)  st<=st+1; end
129:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[16]} ;     if (d==2)  st<=st+1; end

130:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[16]} ;     if (d==2)  st<=st+1; end
131:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[15]} ;     if (d==2)  st<=st+1; end

132:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[15]} ;     if (d==2)  st<=st+1; end
133:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[14]} ;     if (d==2)  st<=st+1; end

134:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[14]} ;     if (d==2)  st<=st+1; end
135:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[13]} ;     if (d==2)  st<=st+1; end

136:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[13]} ;     if (d==2)  st<=st+1; end
137:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[12]} ;     if (d==2)  st<=st+1; end

138:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[12]} ;     if (d==2)  st<=st+1; end
139:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[11]} ;     if (d==2)  st<=st+1; end

140:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[11]} ;     if (d==2)  st<=st+1; end
141:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[10]} ;     if (d==2)  st<=st+1; end

142:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[10]} ;     if (d==2)  st<=st+1; end
143:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[9]} ;     if (d==2)  st<=st+1; end

144:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[9]} ;     if (d==2)  st<=st+1; end
145:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[8]} ;     if (d==2)  st<=st+1; end

146:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[8]} ;     if (d==2)  st<=st+1; end
147:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[7]} ;     if (d==2)  st<=st+1; end

148:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[7]} ;     if (d==2)  st<=st+1; end
149:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[6]} ;     if (d==2)  st<=st+1; end

150:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[6]} ;     if (d==2)  st<=st+1; end
151:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[5]} ;     if (d==2)  st<=st+1; end

152:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[5]} ;     if (d==2)  st<=st+1; end
153:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[4]} ;     if (d==2)  st<=st+1; end

154:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[4]} ;     if (d==2)  st<=st+1; end
155:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[3]} ;     if (d==2)  st<=st+1; end

156:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[3]} ;     if (d==2)  st<=st+1; end
157:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[2]} ;     if (d==2)  st<=st+1; end

158:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[2]} ;     if (d==2)  st<=st+1; end
159:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[1]} ;     if (d==2)  st<=st+1; end

160:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[1]} ;     if (d==2)  st<=st+1; end
161:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[0]} ;     if (d==2)  st<=st+1; end

162:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b01,r32[0]} ;     if (d==2)  st<=st+1; end
 
163:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[0]} ;     if (d==2)  st<=st+1; end
164:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b10,r32[0]} ;     if (d==2)  st<=st+1; end
165:   begin { adf5355_le,adf5355_clk,adf5355_dat} <={2'b00,r32[0]} ;     if (d==2)  st<=st+1; end

166: st <=200;
200: st<=0;

default st<=0; endcase 

endmodule 

-----------

 

上述仿真 图中所见非常完美的时序。