FPGA AD模块

XADC

XC7A15T

自带转换

The ADC conversion data is stored indedicated registers called status registers. These registers are accessible through the FPGA interconnect using a 16-bit synchronous read and write port called the dynamic

Analog-capable I/O have the ADxP or ADxN suffix on the I/O name in the package files.

Auxiliary analog inputs must be connected to the top level of the design.