How does VCS support parameterized virtual interface?

Answer:


1. Following is an example of using a parameterized virtual interface with 
   legal or illegal assignments which works as mentioned(in comments/LRM) 
   in VCS:


-------------------------------------------------------------------------------


            
        interface PBus #(WIDTH=8);  // A parameterized bus interface
         logic req, grant;
         logic [WIDTH-1:0] addr, data;


         modport phy(input addr, ref data);
        endinterface


        module top;
         PBus #(16) p16();
         PBus #(32) p32();


         virtual PBus V8;
         virtual PBus #(35) V35;
         virtual PBus #(16) v16;
         virtual PBus #(16).phy v16_phy;
         virtual PBus #(32) v32;
         virtual PBus #(32).phy v32_phy;


         initial begin
        //following is legal as parameter values match
          v16 = p16; 


        //following is legal as parameter values match 
          v32 = p32; 


        //following is illegal as parameter values do not match
          //v16 = p32; 


        //following is illegal as parameter values do not match
          //v16 = v32; 


        //following is a legal assignment from no selected modport 
        //to selected modport
          v16_phy = v16; 


        //following is an illegal assignment from selected modport 
        //to no selected modport
          //v16 = v16_phy; 


        //following is a legal assignment from no selected modport 
        //to selected modport
          v32_phy = p32; 
        //to no selected modport
          //v32 = p32.phy;  


         end
        endmodule


--------------------------------------------------------------------------------




2. Following is an example of virtual interface being used as a type parameter 
   of a parameterized class, which is supported by VCS:


--------------------------------------------------------------------------------




        interface PBus #(WIDTH=8);  // A parameterized bus interface
         logic req, grant;
         logic [WIDTH-1:0] addr, data;


         modport phy(input addr, ref data);
        endinterface


        module top;
         PBus #(16) p16();
         PBus #(32) p32();
         prog pg(p16);
        endmodule


        program prog(interface I);
        //Parameter can be overridden at type declaration if required
         class cls#(type Tp = virtual PBus #(16));
          Tp vpbus;


          function new;
        // need to assign a proper interface instance depending on the 
        //parameter value being overridden
            vpbus = I;
          endfunction
         endclass
        endprogram

                
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