void RCC_Configuration(void) 时钟配置

void RCC_Configuration(void)
{ 
   ErrorStatus HSEStartUpStatus;
  //GPIO_InitTypeDef GPIO_InitStructure;
  /* RCC system reset(for debug purpose) */
  SystemInit();
  
  RCC_DeInit();   //


  /* Enable HSE */
  RCC_HSEConfig(RCC_HSE_ON);  //SYSCLK=8M
  /* Disenable LSE */
  RCC_LSEConfig(RCC_LSE_OFF);
/* Wait till HSE is ready */
 HSEStartUpStatus = RCC_WaitForHSEStartUp();
  
  if(HSEStartUpStatus == SUCCESS)
  {
    /* HCLK = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1); //SYSCLK=8M   HCLK = 8M
  
    /* PCLK2 = HCLK */
    RCC_PCLK2Config(RCC_HCLK_Div1); //SYSCLK=8M   PCLK2 = 8M


    /* PCLK1 = HCLK/2 */
    RCC_PCLK1Config(RCC_HCLK_Div2);//SYSCLK=8M  PCLK1=4M


    /* Flash 0 wait state */
    FLASH_SetLatency(FLASH_Latency_0);
    /* Enable Prefetch Buffer */
    FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);


    /* PLLCLK = 8MHz * 9= 72 MHz */
   // RCC_PLLSource_HSE_Div2      HSE 2 分频作为 PLL输入  ，9倍频   8/2*9=36M       SYSCLK=8M
    RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);


    /* Enable PLL */ 
    RCC_PLLCmd(ENABLE);  


    /* Wait till PLL is ready */
    while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {
    }


    /* Select PLL as system clock source */
    RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);  //PLLCLK作为系统时钟 SYSCLK=36M 


    /* Wait till PLL is used as system clock source */
    while(RCC_GetSYSCLKSource() != 0x08)
    {
    }
  }
  else
  {
  ///  testccr = 5;
      /* RCC system reset(for debug purpose) */
      SystemInit();
      RCC_DeInit();
      RCC_HSEConfig(RCC_HSE_OFF);
      RCC_LSEConfig(RCC_LSE_OFF);
       /* Flash 0 wait state */
      FLASH_SetLatency(FLASH_Latency_0);
      /* Enable Prefetch Buffer */
      FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
      
      /* HCLK = SYSCLK */
     RCC_HCLKConfig(RCC_SYSCLK_Div1); 
  
      /* PCLK2 = HCLK */
      RCC_PCLK2Config(RCC_HCLK_Div1); 


      /* PCLK1 = HCLK/2 */
      RCC_PCLK1Config(RCC_HCLK_Div2);


      /* PLLCLK = 8MHz/2 * 6 = 24 MHz */
      RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_6);
      
      /* Enable PLL */ 
      RCC_PLLCmd(ENABLE);
        /* Wait till PLL is ready */
      while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
      {
      }
      /* Select PLL as system clock source */
      RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
      /* Wait till PLL is used as system clock source */
      while(RCC_GetSYSCLKSource() != 0x08)
      {
      }


  }
   /* Output the HSI frequency on MCO pin (GPIOA.8)*/ 
   //RCC_MCOConfig(RCC_MCO_PLLCLK_Div2);
/* Output HSE clock on MCO pin ---------------------------------------------*/
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB, ENABLE);
  //RCC_MCOConfig(RCC_MCO_HSI);
  /* Enable USART2 、RCC_APB1Periph_I2C1 clock */
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2|RCC_APB1Periph_I2C1, ENABLE);
  /* Enable GPIOA, GPIOB, GPIOC, USART1, and AFIO clocks */
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 |RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
         | RCC_APB2Periph_AFIO, ENABLE);
 }