VPX规范

本文介绍了VPX总线的3U和6U标准版本,重点阐述了各自的接口配置,包括P0、P1、P2等的信号结构,以及P3-P6的额外信号提供。

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VPX总线分为3U和6U尺寸的两个版本。

3U标准包含3个接口:P0,P1,P2。P0为8片结构,其中3片为电源,可以提供+12V,+5V,+3.3V电源,3片为单端信号片,另外2片为差分信号片。P1为16片结构,提供16组差分对信号。P2为16片结构,能提供16组差分对信号或16个单端信号。

6U标准包含7个接口,分别为PO,Pl,P2,P3,P4,P5,P6。其中,P0-P2和3U标准一样,P3-P6每个接口能提供16组差分对信号或16组单端信号。

 

 

 

 

 

 

 

 

参考:https://wenku.baidu.com/view/a3bb4a7a316c1eb91a37f111f18583d048640f50.html

 

http://www.ucas.com.cn/uploadfile/2015/0226/20150226110424813.pdf

 

https://wenku.baidu.com/view/9ff9781dba1aa8114431d93b.html?sxts=1599460762955&word=vpx%20%E6%A0%87%E5%87%86

Abstract This standard describes VITA 46.0 Advanced Module Format for VMEbus systems, an evolutionary step forward for the provision of high-speed interconnects in harsh-environment applications. Foreword VME has been the de-facto bus standard for Commercial off the Shelf ( COTS ) Circuit Card Assemblies since the 1980’s. VME boards have proven to be remarkably capable of evolving to support newer technologies with innovations such as VME Subsystem Bus, PCI Mezzanine Cards (PMC’s) and VME320. However, advances in technologies, appearing particularly in interconnects, have demonstrated the need for an advance in system development. This advance needs to accommodate high speed interconnect, particularly serial interconnects, and higher power delivery in concert with better heat removal. This draft standard addresses these needs in the context of IEEE 1101 form factor modules. Other specifications may address alternate outlines, such as VITA-48 (Draft). Because electronics miniaturization is driving the plug-in module I/O count, most system interconnects will need:  Multi-gigabit differential technology  Core computing cluster switched fabrics  Serial RapidIO, PCI Express, Advanced Switching Interconnect  Sufficient ports to enable distributed switching or centralized switching The plethora of high-speed interfaces available for tomorrow’s plug-in modules:  Network interfaces (Fibre Channel, 10 GbE XAUI, Infiniband…,)  Digital video (TMDS, PanelLink, OpenLDI…)  Mass storage interface (Fibre Channel, Serial ATA…,)  FPGA-based inter-board connections (e.g. Xilinx RocketIO)  Custom sensor interfaces VITA 46 provides an evolutionary roadmap for VME users:  To leverage the broad spectrum of high-speed interconnect technologies  Backward compatibility with VME bus electrical, software and selected mechanicals  Enables heterogeneous architectures which preserve existing investments in COTS-based systems  Addresses both 3U and 6U form factors with commonality  Harsh environment fit ‘designed-in’ up front in the standard  Rugged air or conduction-cooled form factors  High value placed on rear-panel I/O  High-speed connector survivability/compliance
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