##-----------------------------------------------------------------------------
## Hardware supplied vectors
.set noreorder
.section ".reset_vector","ax"
# Reset vector at 0xBFC00000
>>cpu从这里开始执行
FUNC_START(reset_vector)
>>cpu vendor 添加一些初始化,比如一些clock,reset;
>>在CYG_HAL_STARTUP_RAM不需要,因为在_ROMRAM,_ROM才需要
#ifndef CYG_HAL_STARTUP_RAM
# if defined(CYGPKG_HAL_RESET_VECTOR_FIRST_CODE)
hal_reset_vector_first_code
# endif
# if defined(CYGPKG_HAL_EARLY_INIT)
hal_early_init
# endif
# Decide whether this is an NMI, cold or warm boot.
>>这里英文注释已经很清楚了
mfc0 k0,status # get status reg
lui k1,0x0008 # isolate NMI bit
and k1,k1,k0
beqz k1,1f # skip if zero
nop
lar k1,__nmi_entry # jump to ROM nmi code
jalr k1
nop
1:
lui k1,0x0010 # isolate soft reset bit
and k1,k1,k0
beqz k1,2f # skip if zero
nop
lar k1,__warm_start # jump to ROM warm_start code
jr k1
nop
2:
la k0,INITIAL_CONFIG0 # Set up config0 register
mtc0 k0,config0 # to disable cache
#endif
lar v0,_start # jump to start
#ifdef CYGARC_START_FUNC_UNCACHED
CYGARC_ADDRESS_REG_UNCACHED(v0)
#endif
jr v0
nop # (delay slot)
FUNC_END(reset_vector)
>>这里几个*_vector是mips exception 的入口,详细的去看mips的书籍
>>值得提出的是,这几个位置会被前面的code比如hal_reset_vector_first_code
>>挤出正确的位置,不过后面还会有些code会把这些*_vector复制到ram里的相应的位置
>>只要保证在code切换到ram exception mode之前,不要产生任何exception就可以了
.section ".debug_vector","ax"
# Debug vector at 0xBFC00200
## Hardware supplied vectors
.set noreorder
.section ".reset_vector","ax"
# Reset vector at 0xBFC00000
>>cpu从这里开始执行
FUNC_START(reset_vector)
>>cpu vendor 添加一些初始化,比如一些clock,reset;
>>在CYG_HAL_STARTUP_RAM不需要,因为在_ROMRAM,_ROM才需要
#ifndef CYG_HAL_STARTUP_RAM
# if defined(CYGPKG_HAL_RESET_VECTOR_FIRST_CODE)
hal_reset_vector_first_code
# endif
# if defined(CYGPKG_HAL_EARLY_INIT)
hal_early_init
# endif
# Decide whether this is an NMI, cold or warm boot.
>>这里英文注释已经很清楚了
mfc0 k0,status # get status reg
lui k1,0x0008 # isolate NMI bit
and k1,k1,k0
beqz k1,1f # skip if zero
nop
lar k1,__nmi_entry # jump to ROM nmi code
jalr k1
nop
1:
lui k1,0x0010 # isolate soft reset bit
and k1,k1,k0
beqz k1,2f # skip if zero
nop
lar k1,__warm_start # jump to ROM warm_start code
jr k1
nop
2:
la k0,INITIAL_CONFIG0 # Set up config0 register
mtc0 k0,config0 # to disable cache
#endif
lar v0,_start # jump to start
#ifdef CYGARC_START_FUNC_UNCACHED
CYGARC_ADDRESS_REG_UNCACHED(v0)
#endif
jr v0
nop # (delay slot)
FUNC_END(reset_vector)
>>这里几个*_vector是mips exception 的入口,详细的去看mips的书籍
>>值得提出的是,这几个位置会被前面的code比如hal_reset_vector_first_code
>>挤出正确的位置,不过后面还会有些code会把这些*_vector复制到ram里的相应的位置
>>只要保证在code切换到ram exception mode之前,不要产生任何exception就可以了
.section ".debug_vector","ax"
# Debug vector at 0xBFC00200