卷积神经网络的硬件加速

【阿里集团卜居深度解析】卷积神经网络的硬件加速（一）
http://www.openhw.org/module/forum/forum.php?mod=viewthread&tid=597673&fromuid=3380847
(出处: OpenHW技术社区)

【阿里集团卜居深度解析】卷积神经网络的硬件加速（二）
http://www.openhw.org/module/forum/forum.php?mod=viewthread&tid=597674&fromuid=3380847
(出处: OpenHW技术社区)

参考文献
【1】Amos, Jagath. FPGA IMPLEMENTATIONS OF NEURAL NETWORKS. Springer 2006.
【2】Yann LeCun, et al. CNP : An FPGA-based Processor for Convolutional Networks. 2009.
【3】Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks, 2015, ACM 978-1-4503-3315-3/15/02
【4】Accelerating Deep Convolutional Neural Networks Using Specialized Hardware, 2015.
【5】Stratix 10 Device Overview, Altera, 2015.12.
【6】 A. Krizhevsky, I. Sutskever, and G. E. Hinton. Imagenet classification with deep convolutional neural networks.  NIPS 2012.
【7】 J. Cong and B. Xiao. Minimizing computation in convolutional neural networks. ICANN 2014.
【8】 http://www.xilinx.com/products/boards-and-kits/ek-v7-vc707-g.html
【9】 A 240 G-ops/s Mobile Coprocessor for Deep Neural Networks, 2013
【10】A. Putnam, et al., A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services, International Symposium on Computer Architecture, 2014.
【11】http://auvizsystems.com/products/auvizdnn/
【12】http://www.eweek.com/servers/int ... a-accelerators.html