msm8660 add lcd driver

增加mipi himax hx8363a lcd驱动

android/bootable/bootloader/lk/platform/msm8x60/panel_himax_mipi.c[new file with mode: 0644]
android/bootable/bootloader/lk/platform/msm_shared/include/mipi_dsi.h 
android/bootable/bootloader/lk/platform/msm_shared/mipi_dsi.c 
android/bootable/bootloader/lk/target/msm8660_surf/include/target/display.h 
android/bootable/bootloader/lk/target/msm8660_surf/rules.mk 
android/kernel/arch/arm/mach-msm/board-msm8x60.c 
android/kernel/drivers/video/msm/mipi_himax_hx8363a.c[new file with mode: 0644]
android/kernel/drivers/video/msm/mipi_himax_hx8363a.h[new file with mode: 0644]
android/kernel/drivers/video/msm/mipi_himax_hx8363a_cmd_fwvga_pt.c[new file with mode: 0644]
modem_proc/build/ms/OT300.cmd 

@@ -1059,6 +1059,103 @@  static struct mipi_dsi_phy_ctrl mipi_dsi_boe_panel_phy_ctrl = {
 #endif //1
 };
 
+#if (DISPLAY_MIPI_PANEL_HIMAX)
+/***** himax hx8363a WVGA *******/
+
+
+  
+static char himax_enable[8] = {0x04, 0x00, DTYPE_DCS_LWRITE, 0xc0,
+       0xB9, 0xFF, 0x83, 0x63}; // DTYPE_DCS_LWRITE, delay 10ms
+static char himax_enable1[4] = {0x11, 0z00, DTYPE_DCS_WRITE, 0X80};//DTYPE_DCS_WRITE, delay 120ms
+static char himax_enable2[8] = {0x04, 0x00, DTYPE_DCS_LWRITE, 0xc0,
+       0xB9, 0xFF, 0x83, 0x63};// DTYPE_DCS_LWRITE, delay 10ms
+static char himax_24bit_rgb[4] = {0x3A, 0x70, DTYPE_DCS_WRITE1, 0x80};// DTYPE_DCS_WRITE1, delay 10ms
+static char himax_set_power[20] = {0x0D, 0x00, DTYPE_DCS_LWRITE, 0xc0,
+       0xB1, 0x78, 0x34, 0x05,
+       0x34, 0x02, 0x13, 0x11, 
+       0x11, 0x35, 0x3E, 0x20, 
+       0x20, 0xFF, 0xFF, 0xFF}; // DTYPE_DCS_LWRITE, delay 10ms
+static char himax_set_power1[4] = {0xB3, 0x01, DTYPE_DCS_WRITE1, 0x80}; // DTYPE_DCS_WRITE1, delay 10ms
+static char himax_set_cyc[16] = {0x0C, 0x00, DTYPE_DCS_LWRITE, 0xc0,
+       0xB4, 0x00, 0x12, 0x72, 
+       0x12, 0x06, 0x03, 0x54, 
+       0x03, 0x4E, 0x00, 0x00};// DTYPE_DCS_LWRITE, delay 10ms
+static char himax_set_vcom[4] = {0xB6, 0x41, DTYPE_DCS_WRITE1, 0x80};// DTYPE_DCS_WRITE1, delay 10ms
+static char himax_set_gamma[36] = {0x1F, 0x00, DTYPE_DCS_LWRITE, 0xc0,
+       0xE0, 0x00, 0x89, 0x10
+  0xA3, 0x33, 0x3F, 0x06, 
+  0x8E, 0x11, 0x15, 0x18, 
+  0xD6, 0x17, 0x49, 0x13, 
+  0x00, 0x89, 0x10, 0xA7, 
+  0x33, 0x3F, 0x06, 0x8E, 
+  0x11, 0x15, 0x18, 0xD6
+  0x17, 0x49, 0x13, 0xFF
+};// DTYPE_DCS_LWRITE, delay 10ms
+static char himax_set_gamma1[] = {0x36, 0x08, DTYPE_DCS_WRITE1, 0x80};// DTYPE_DCS_WRITE1, delay 10ms
+static char himax_set_panel[] = {0xCC, 0x02, DTYPE_DCS_WRITE1, 0x80};// DTYPE_DCS_WRITE1, delay 10ms
+static char himax_set_panel1[] = {0x29, 00, DTYPE_DCS_WRITE, 0x80};// DTYPE_DCS_WRITE
+
+
+
+static struct mipi_dsi_cmd himax_hx8363a_panel_video_mode_cmds[] = {
+
+  
+       {sizeof(himax_enable),             himax_enable,        10},
+       {sizeof(himax_enable1),            himax_enable1,       120},
+       {sizeof(himax_enable2),            himax_enable2,       10},
+       {sizeof(himax_24bit_rgb),          himax_24bit_rgb,     10},
+       {sizeof(himax_set_power),          himax_set_power,     10},
+       {sizeof(himax_set_power1),         himax_set_power1,    10},
+       {sizeof(himax_set_cyc),            himax_set_cyc,       10},
+       {sizeof(himax_set_vcom),           himax_set_vcom,      10},
+       {sizeof(himax_set_gamma),          himax_set_gamma,     10},
+       {sizeof(himax_set_gamma1),         himax_set_gamma1,    10},
+       {sizeof(himax_set_panel),          himax_set_panel,     10},
+       {sizeof(himax_set_panel1),         himax_set_panel1,    10}
+       
+
+};
+
+#define HIMAX_HX8363A_FWVGA_TWO_LANE 1
+static struct mipi_dsi_phy_ctrl mipi_dsi_himax_hx8363a_panel_phy_ctrl = {
+#if 1
+    /* DSI_BIT_CLK at 400MHz, 1 lane, RGB888 */        
+    /* regulator */
+       {0x03, 0x01, 0x01, 0x00},       
+       /* timing   */  
+       {0xaa, 0x3b, 0x1b, 0x00, 0x52, 0x58, 0x20, 0x3f, 0x2e, 0x03, 0x04},     
+       /* phy ctrl */
+       {0x7f, 0x00, 0x00, 0x00},       
+       /* strength */
+       {0xee, 0x00, 0x86, 0x00},       
+       /* pll control */       
+       {0x40, 0xc7, 0xb0, 0xda, 0x00, 0x50, 0x48, 0x63,
+#if defined(HIMAX_HX8363A_FWVGA_TWO_LANE)      
+       0x30, 0x07, 0x03,
+#else  
+       /* default set to 1 lane */     
+       0x30, 0x07, 0x07,
+#endif 
+       0x05, 0x14, 0x03, 0x0, 0x0, 0x54, 0x06, 0x10, 0x04, 0x0},
+
+#else //1
+
+       /* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
+       {0x03, 0x01, 0x01, 0x00},       /* regulator */
+       /* timing   */
+       {0xb9, 0x8e, 0x1f, 0x00, 0x98, 0x9c, 0x22,
+        0x90, 0x18, 0x03, 0x04},
+       {0x7f, 0x00, 0x00, 0x00},       /* phy ctrl */
+       {0xbb, 0x02, 0x06, 0x00},       /* strength */
+       /* pll control */
+       {0x00, 0xec, 0x31, 0xd2, 0x00, 0x40, 0x37, 0x62,
+        0x01, 0x0f, 0x07,      /*  --> Two lane configuration */
+        0x05, 0x14, 0x03, 0x0, 0x0, 0x0, 0x20, 0x0, 0x02, 0x0},
+        
+#endif //1
+};
+#endif // DISPLAY_MIPI_PANEL_HIMAX
+
 static struct mipi_dsi_phy_ctrl mipi_dsi_novatek_panel_phy_ctrl = {
        /* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
        {0x03, 0x01, 0x01, 0x00},       /* regulator */

@@ -82,6 +82,24 @@  struct mipi_dsi_panel_config boe_panel_info = {
        .panel_cmds = boe_panel_video_mode_cmds,
        .num_of_panel_cmds = ARRAY_SIZE(boe_panel_video_mode_cmds),
 };
+#elif defined(DISPLAY_MIPI_PANEL_HIMAX)
+static struct fbcon_config mipi_fb_cfg = {
+       .height = HIMAX_HX8363A_MIPI_FB_HEIGHT,
+       .width = HIMAX_HX8363A_MIPI_FB_WIDTH,
+       .stride = HIMAX_HX8363A_MIPI_FB_WIDTH,
+       .format = FB_FORMAT_RGB888,
+       .bpp = 24,
+       .update_start = NULL,
+       .update_done = NULL,
+};
+
+struct mipi_dsi_panel_config himax_hx8363a_panel_info = {
+       .mode = MIPI_VIDEO_MODE,//MIPI_CMD_MODE,//
+       .num_of_lanes = 2,
+       .dsi_phy_config = &mipi_dsi_himax_hx8363a_panel_phy_ctrl,
+       .panel_cmds = himax_hx8363a_panel_video_mode_cmds,
+       .num_of_panel_cmds = ARRAY_SIZE(himax_hx8363a_panel_video_mode_cmds),
+};
 #elif DISPLAY_MIPI_PANEL_NOVATEK_BLUE
 static struct fbcon_config mipi_fb_cfg = {
        .height = NOV_MIPI_FB_HEIGHT,
@@ -253,6 +271,8 @@  struct mipi_dsi_panel_config *get_panel_info(void)
   return &toshiba_panel_info;
 #elif DISPLAY_MIPI_PANEL_BOE
        return &boe_panel_info;
+#elif (DISPLAY_MIPI_PANEL_HIMAX)
+       return &himax_hx8363a_panel_info;
 #elif DISPLAY_MIPI_PANEL_NOVATEK_BLUE
        return &novatek_panel_info;
 #elif DISPLAY_MIPI_PANEL_TOSHIBA_MDT61
@@ -82,6 +82,24 @@  struct mipi_dsi_panel_config boe_panel_info = {
        .panel_cmds = boe_panel_video_mode_cmds,
        .num_of_panel_cmds = ARRAY_SIZE(boe_panel_video_mode_cmds),
 };
+#elif defined(DISPLAY_MIPI_PANEL_HIMAX)
+static struct fbcon_config mipi_fb_cfg = {
+       .height = HIMAX_HX8363A_MIPI_FB_HEIGHT,
+       .width = HIMAX_HX8363A_MIPI_FB_WIDTH,
+       .stride = HIMAX_HX8363A_MIPI_FB_WIDTH,
+       .format = FB_FORMAT_RGB888,
+       .bpp = 24,
+       .update_start = NULL,
+       .update_done = NULL,
+};
+
+struct mipi_dsi_panel_config himax_hx8363a_panel_info = {
+       .mode = MIPI_VIDEO_MODE,//MIPI_CMD_MODE,//
+       .num_of_lanes = 2,
+       .dsi_phy_config = &mipi_dsi_himax_hx8363a_panel_phy_ctrl,
+       .panel_cmds = himax_hx8363a_panel_video_mode_cmds,
+       .num_of_panel_cmds = ARRAY_SIZE(himax_hx8363a_panel_video_mode_cmds),
+};
 #elif DISPLAY_MIPI_PANEL_NOVATEK_BLUE
 static struct fbcon_config mipi_fb_cfg = {
        .height = NOV_MIPI_FB_HEIGHT,
@@ -253,6 +271,8 @@  struct mipi_dsi_panel_config *get_panel_info(void)
   return &toshiba_panel_info;
 #elif DISPLAY_MIPI_PANEL_BOE
        return &boe_panel_info;
+#elif (DISPLAY_MIPI_PANEL_HIMAX)
+       return &himax_hx8363a_panel_info;
 #elif DISPLAY_MIPI_PANEL_NOVATEK_BLUE
        return &novatek_panel_info;
 #elif DISPLAY_MIPI_PANEL_TOSHIBA_MDT61

 #define MIPI_VSYNC_BACK_PORCH_LINES  20
 #define MIPI_VSYNC_FRONT_PORCH_LINES 20
 
+#if (VALUE_MIPI_PANEL_BOE)
 #define BOE_MIPI_FB_WIDTH    480
 #define BOE_MIPI_FB_HEIGHT   800
+endif // VALUE_MIPI_PANEL_BOE
+
+#if (DISPLAY_MIPI_PANEL_HIMAX)
+#define HIMAX_HX8363A_MIPI_FB_WIDTH    480
+#define HIMAX_HX8363A_MIPI_FB_HEIGHT   800
+#endif //DISPLAY_MIPI_PANEL_HIMAX
 
 /* HDMI Panel Macros for 1080p */
 #define DTV_FB_HEIGHT     1080

 #define MIPI_VSYNC_BACK_PORCH_LINES  20
 #define MIPI_VSYNC_FRONT_PORCH_LINES 20
 
+#if (VALUE_MIPI_PANEL_BOE)
 #define BOE_MIPI_FB_WIDTH    480
 #define BOE_MIPI_FB_HEIGHT   800
+endif // VALUE_MIPI_PANEL_BOE
+
+#if (DISPLAY_MIPI_PANEL_HIMAX)
+#define HIMAX_HX8363A_MIPI_FB_WIDTH    480
+#define HIMAX_HX8363A_MIPI_FB_HEIGHT   800
+#endif //DISPLAY_MIPI_PANEL_HIMAX
 
 /* HDMI Panel Macros for 1080p */
 #define DTV_FB_HEIGHT     1080

 #define MIPI_CMD_RENESAS_LS045_FWVGA_PANEL_NAME                "mipi_renesas_ls045"
 #define MIPI_CMD_SHARP_LS047_WXGA_PANEL_NAME           "mipi_sharp_ls047"
 #define MIPI_BOE_WL4309W_PANEL_NAME "mipi_boe_wl4309w"
+#define MIPI_HIMAX_HX8363A_PANEL_NAME "mipi_himax_hx8363a"
 
 #define HDMI_PANEL_NAME        "hdmi_msm"
 #define TVOUT_PANEL_NAME       "tvout_msm"
@@ -3463,6 +3464,10 @@  static int msm_fb_detect_panel(const char *name)
                if (!strcmp(name, MIPI_BOE_WL4309W_PANEL_NAME))
                        return 0;
 #endif
+#ifdef CONFIG_FB_MSM_MIPI_DSI_HIMAX_HX8363A_PT
+               if (!strcmp(name, MIPI_HIMAX_HX8363A_PANEL_NAME))
+                       return 0;
+#endif
 #ifdef CONFIG_FB_MSM_MIPI_DSI_SHARP_LS047_PT
                if (!strcmp(name, MIPI_CMD_SHARP_LS047_WXGA_PANEL_NAME))
                        return 0;
@@ -3912,6 +3917,21 @@  static struct platform_device mipi_dsi_boe_wl4309w_panel_device = {
 };
 #endif
 
+#ifdef CONFIG_FB_MSM_MIPI_DSI_HIMAX_HX8363A_PT
+static struct mipi_dsi_panel_platform_data himax_hx8363a_pdata = {
+       .fpga_3d_config_addr  = FPGA_3D_GPIO_CONFIG_ADDR,
+       .fpga_ctrl_mode = FPGA_EBI2_INTF,
+};
+
+static struct platform_device mipi_dsi_himax_hx8363a_panel_device = {
+       .name = MIPI_HIMAX_HX8363A_PANEL_NAME,
+       .id = 0,
+       .dev = {
+               .platform_data = &himax_hx8363a_pdata,
+       }
+};
+#endif
+
 #ifdef CONFIG_FB_MSM_MIPI_DSI_SHARP_LS047_PT
 static struct mipi_dsi_panel_platform_data sharp_ls047_pdata = {
        
@@ -7057,6 +7077,9 @@  static struct platform_device *surf_devices[] __initdata = {
 #ifdef CONFIG_FB_MSM_MIPI_DSI_BOE_WL4309W_PT
        &mipi_dsi_boe_wl4309w_panel_device,
 #endif
+#ifdef CONFIG_FB_MSM_MIPI_DSI_HIMAX_HX8363A_PT
+       &mipi_dsi_himax_hx8363a_panel_device,
+#endif
 #ifdef CONFIG_FB_MSM_MIPI_DSI_SHARP_LS047_PT
        &mipi_dsi_sharp_ls047_panel_device,
 #endif
@@ -12654,6 +12677,34 @@  static void mipi_dsi_boe_wl4309w_panel_power(int on)
 }
 #endif
 
+#ifdef CONFIG_FB_MSM_MIPI_DSI_HIMAX_HX8363A_PT
+
+#define MSM_GPIO_MIPI_PWR_EN           96
+#define MSM_GPIO_MIPI_RESET            94
+#define MSM_GPIO_MIPI_BOOST            26
+
+static void mipi_dsi_himax_hx8363a_panel_power(int on)
+{
+       static int powered_on = 1;
+
+       printk(KERN_ERR "%s %s \n", __func__, on? "on" : "off");
+
+       if (on && !powered_on)  {
+               powered_on = 1;
+               gpio_set_value(MSM_GPIO_MIPI_PWR_EN, true);         mdelay(30);
+               gpio_set_value(MSM_GPIO_MIPI_RESET, false);          mdelay(10);
+               gpio_set_value(MSM_GPIO_MIPI_BOOST, true);          mdelay(30);
+               gpio_set_value(MSM_GPIO_MIPI_RESET, true);          mdelay(30);
+       }
+       else if (!on && powered_on)  {
+               powered_on = 0;
+               gpio_set_value(MSM_GPIO_MIPI_BOOST, false);          mdelay(10);
+               gpio_set_value(MSM_GPIO_MIPI_PWR_EN, false);         mdelay(10);
+               gpio_set_value(MSM_GPIO_MIPI_RESET, false);          mdelay(10);
+       }
+}
+#endif
+
 #ifdef CONFIG_FB_MSM_MIPI_DSI_SHARP_LS047_PT
 #define MSM_GPIO_MIPI_SHARP_PANEL_IOVDD 4
 #define MSM_GPIO_MIPI_SHARP_PANEL_AVDD 96
@@ -12711,6 +12762,9 @@  static int mipi_dsi_panel_power(int on)
 #elif defined(CONFIG_FB_MSM_MIPI_DSI_BOE_WL4309W_PT)
        mipi_dsi_boe_wl4309w_panel_power(on);
        return 0;
+#elif defined(CONFIG_FB_MSM_MIPI_DSI_HIMAX_HX8363A_PT)
+       mipi_dsi_himax_hx8363a_panel_power(on);
+       return 0;
 #elif defined(CONFIG_FB_MSM_MIPI_DSI_SHARP_LS047_PT)
        mipi_dsi_sharp_ls047_panel_power(on);
        return 0;

@@ -100,6 +100,9 @@  export BSP_ANY_3RDAPP_IME_SOGOU=1
 #export BSP_ANY_3RDAPP_SKYNET_NOTES=1
 #export BSP_ANY_3RDAPP_SKYNET_GN=1
 
+export BSP_ANY_MIPI_LCD_BOE=1
+#export BSP_ANY_MIPI_LCD_HIMAX=1
+
 #export BSP_ANY_WALLPAPER_FIXED=1
 
 . ./POSTSTEPS.cmd



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