.globl含义:告诉编译器,这个符号要被链接器用到;所以要在目标文件的符号表中标记它是一个全局符号;
.word含义:代表是字,一个字长;与处理器位数相关;
.globl _start
_start: b reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
_undefined_instruction: .word undefined_instruction /*未定义指令*/
_software_interrupt: .word software_interrupt /*软中断*/
_prefetch_abort: .word prefetch_abort /*指令预取异常*/
_data_abort: .word data_abort/*数据异常*/
_not_used: .word not_used
_irq: .word irq/*中断*/
_fiq: .word fiq/*快速中断*/
_pad: .word 0x12345678 /* now 16*4=64 */
__blank_zone_start:
.fill 1024*4,1,0
__blank_zone_end:
.globl _blank_zone_start
_blank_zone_start:
.word __blank_zone_start
.globl _blank_zone_end
_blank_zone_end:
.word __blank_zone_end
.balignl 16,0xdeadbeef
_start: b reset 语句直接跳转到reset;
reset:
/* set the cpu to SVC32 mode
设置cpu为SVC32模式;
*/
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0xd3
msr cpsr,r0
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
mcr p15, 0, r0, c1, c0, 0
/*
* read system register REG_SC_GEN2 check if ziju flag
读系统寄存器 检查是否有ziju幻数;
*/
ldr r0, =SYS_CTRL_REG_BASE
ldr r1, [r0, #REG_SC_GEN2]
ldr r2, =0x7a696a75 /* magic for "ziju" */
cmp r1, r2
bne normal_start_flow
mov r1, sp /* save sp */
str r1, [r0, #REG_SC_GEN2] /* clear ziju flag */
/* init PLL/DDRC/pin mux/... */
ldr r0, _blank_zone_start
ldr r1, _TEXT_BASE
sub r0, r0, r1
ldr r1, =RAM_START_ADRS
add r0, r0, r1
mov r1, #0x0 /* flags: 0->normal 1->pm */
bl init_registers /* init PLL/DDRC/... */
ldr sp, =STACK_TRAINING
#ifdef CONFIG_SVB_ENABLE
bl start_svb
#endif
/* after ziju, we need ddr traning */
#ifdef CONFIG_DDR_TRAINING_V2
ldr r0, =REG_BASE_SCTL
bl start_ddr_training /* DDR training */
#endif
ldr r0, =SYS_CTRL_REG_BASE
ldr r1, [r0, #REG_SC_GEN2]
mov sp, r1 /* restore sp */
ldr r1, [r0, #REG_SC_GEN3]
mov pc, r1 /* return to bootrom */
nop
nop
nop
nop
nop
nop
nop
nop
b . /* bug here */
设置cpu为SVC32模式;
刷新I Cache或D Cache; 刷新v4 TLB;
禁止MMU内容和缓存;
初始化PLL/DDRC及引脚复用;
ziju后,需要DDR Traning(当布线去掉等长约束或放宽约束条件,就要做ddr training);
normal_start_flow:
/* init serial and printf a string. */
ldr sp, =STACK_TRAINING
bl uart_early_init
bl msg_main_cpu_startup
@if running not boot from fmc
@we skipping boot_type checking.
mov r0, pc, lsr#24
cmp r0, #0x0
bne do_clr_remap
/* check_boot_type */
ldr r0, =SYS_CTRL_REG_BASE
ldr r0, [r0, #REG_SYSSTAT]
mov r6, r0, lsr#4
and r6, #0x1
cmp r6, #BOOT_FROM_FMC @ [4]:0 fmc, 1 emmc */
ldreq pc, _clr_remap_fmc_entry
@otherwise, [31]=1 means boot from bootrom, err
beq bug
初始化串口和打印一个字符串;
检查boot类型; fmc还是emmc;
do_clr_remap: /*清除重隐射*/
...
@enable I-Cache now /*使能I Cache*/
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0
relocate:/*代码重定位*/
...
copy_abort_code:/*复制异常代码*/
...
stack_setup:/*设置堆栈*/
...
clear_bss:/*清空bss段*/
...
ldr pc, _start_armboot @ jump to C code
_start_armboot: .word start_armboot /*跳转到c代码*/
清除重隐射
使能I Cache
代码重定位
复制异常代码
设置堆栈
清空bss段
跳转到c代码