0510 spf文件调试过程

Dc命令

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gui_start

analyze -library WORK -format verilog{/usr/synopsys/LAB/s27/syn/s27.v}

elaborate s27 -architecture verilog -library DEFAULT

create_clock blif_clk_net -period 100-waveform {0 50}

set_dft_signal -view existing_dft -typeScanClock -timing {45 55} -port blif_clk_net

set_dft_signal -view existing_dft -typeReset -active_state 1 -port blif_reset_net

set_ideal_network -no_pro {blif_clk_net}

set_scan_configuration -chain_count 10

set test_default_scan_style multiplexed_flip_flop

create_test_protocol -infer_async -infer_clock

dft_drc -verbose

compile -scan

report_constraint -all_violators

insert_dft

report_constraint -all_violators

dft_drc -verbose -coverage_estimate

write -format ddc -hierarchy -output s27.ddc

write -for