I.MX6U-ALPHA开发板（模仿STM32驱动开发实验）

最新推荐文章于 2024-06-11 08:15:00 发布
最新推荐文章于 2024-06-11 08:15:00 发布
阅读量157 收藏 1
点赞数
分类专栏： Linux # Ubuntu I.MX6U-ALPHA开发板 文章标签： stm32 驱动开发 单片机
版权声明：本文为博主原创文章，遵循 CC 4.0 BY-SA 版权协议，转载请附上原文出处链接和本声明。
本文链接：https://blog.csdn.net/qq_61540355/article/details/125588915
版权

文章目录

一、STM32寄存器结构体详解

​ 对于STM32而言，使用一个结构体将一个外设的所有寄存器都放到一起。

二、修改驱动

1、添加清除bss段代码

.global _start  		/* 全局标号 */

.global __bss_start
_bss_start:
	.word __bss_start

.global __bss_end
_bss_end:
	.word __bss_end

/*
 * 描述：	_start函数，程序从此函数开始执行，此函数主要功能是设置C
 *		 运行环境。
 */
_start:

	/* 进入SVC模式 */
	mrs r0, cpsr
	bic r0, r0, #0x1f 	/* 将r0寄存器中的低5位清零，也就是cpsr的M0~M4 	*/
	orr r0, r0, #0x13 	/* r0或上0x13,表示使用SVC模式					*/
	msr cpsr, r0		/* 将r0 的数据写入到cpsr_c中 					*/

	/* 清BSS段 */
	ldr r0, _bss_start
	ldr r1, _bss_end
	mov r2,  #0
bss_loop:
	stmia r0!, {r2}		/* 向r0的地址写入0,然后r0寄存器保存的地址值加1 */
	cmp r0, r1  		/* 比较r0和r1，也就是__bss_start和__bss_end的值*/
	ble bss_loop		/* 如果小于等于的话就跳转到bss_loop继续清bss段*/

	/* 设置sp指针 */
	ldr sp,=0X80200000	/* 设置栈指针			 */
	b main				/* 跳转到main函数 		 */

2、添加寄存器结构体

​ 在结构体中添加寄存器的时候一定要注意地址的连续性，如果不连续的话要添加占位。

/* 
* 外设寄存器组的基地址 
*/
#define CCM_BASE					(0X020C4000)
#define CCM_ANALOG_BASE				(0X020C8000)
#define IOMUX_SW_MUX_BASE			(0X020E0014)
#define IOMUX_SW_PAD_BASE			(0X020E0204)
#define GPIO1_BASE                  (0x0209C000)
#define GPIO2_BASE                  (0x020A0000)
#define GPIO3_BASE                  (0x020A4000)
#define GPIO4_BASE                  (0x020A8000)
#define GPIO5_BASE                  (0x020AC000)

/* 
* CCM寄存器结构体定义，分为CCM和CCM_ANALOG 
*/
typedef struct 
{
   volatile unsigned int CCR;
   volatile unsigned int CCDR;
   volatile unsigned int CSR;
   volatile unsigned int CCSR;
   volatile unsigned int CACRR;
   volatile unsigned int CBCDR;
   volatile unsigned int CBCMR;
   volatile unsigned int CSCMR1;
   volatile unsigned int CSCMR2;
   volatile unsigned int CSCDR1;
   volatile unsigned int CS1CDR;
   volatile unsigned int CS2CDR;
   volatile unsigned int CDCDR;
   volatile unsigned int CHSCCDR;
   volatile unsigned int CSCDR2;
   volatile unsigned int CSCDR3;	
   volatile unsigned int RESERVED_1[2];
   volatile unsigned int CDHIPR;  
   volatile unsigned int RESERVED_2[2];
   volatile unsigned int CLPCR;
   volatile unsigned int CISR;
   volatile unsigned int CIMR;
   volatile unsigned int CCOSR;
   volatile unsigned int CGPR;
   volatile unsigned int CCGR0;
   volatile unsigned int CCGR1;
   volatile unsigned int CCGR2;
   volatile unsigned int CCGR3;
   volatile unsigned int CCGR4;
   volatile unsigned int CCGR5;
   volatile unsigned int CCGR6;
   volatile unsigned int RESERVED_3[1];
   volatile unsigned int CMEOR;	
} CCM_Type; 

typedef struct 
{
   volatile unsigned int PLL_ARM;
   volatile unsigned int PLL_ARM_SET;
   volatile unsigned int PLL_ARM_CLR;
   volatile unsigned int PLL_ARM_TOG;
   volatile unsigned int PLL_USB1;
   volatile unsigned int PLL_USB1_SET;
   volatile unsigned int PLL_USB1_CLR;
   volatile unsigned int PLL_USB1_TOG;
   volatile unsigned int PLL_USB2;
   volatile unsigned int PLL_USB2_SET;
   volatile unsigned int PLL_USB2_CLR;
   volatile unsigned int PLL_USB2_TOG;
   volatile unsigned int PLL_SYS;
   volatile unsigned int PLL_SYS_SET;
   volatile unsigned int PLL_SYS_CLR;
   volatile unsigned int PLL_SYS_TOG;
   volatile unsigned int PLL_SYS_SS;
   volatile unsigned int RESERVED_1[3];
   volatile unsigned int PLL_SYS_NUM;
   volatile unsigned int RESERVED_2[3];
   volatile unsigned int PLL_SYS_DENOM; 
   volatile unsigned int RESERVED_3[3];
   volatile unsigned int PLL_AUDIO;
   volatile unsigned int PLL_AUDIO_SET;
   volatile unsigned int PLL_AUDIO_CLR;
   volatile unsigned int PLL_AUDIO_TOG;
   volatile unsigned int PLL_AUDIO_DENOM;
   volatile unsigned int RESERVED_4[3];
   volatile unsigned int PLL_VIDEO;
   volatile unsigned int PLL_VIDEO_SET;
   volatile unsigned int PLL_VIDEO_CLR;
   volatile unsigned int PLL_VIDEO_TOG;
   volatile unsigned int PLL_VIDEO_NUM;
   volatile unsigned int RESERVED_5[3];
   volatile unsigned int PLL_VIDEO_DENOM;
   volatile unsigned int RESERVED_6[7];
   volatile unsigned int PLL_ENET;
   volatile unsigned int PLL_ENET_SET;
   volatile unsigned int PLL_ENET_CLR;
   volatile unsigned int PLL_ENET_TOG;
   volatile unsigned int PFD_480;
   volatile unsigned int PFD_480_SET;
   volatile unsigned int PFD_480_CLR;
   volatile unsigned int PFD_480_TOG;
   volatile unsigned int PFD_528;
   volatile unsigned int PFD_528_SET;
   volatile unsigned int PFD_528_CLR;
   volatile unsigned int PFD_528_TOG;
   volatile unsigned int RESERVED_7[16];
   volatile unsigned int MISC0;
   volatile unsigned int MISC0_SET;
   volatile unsigned int MISC0_CLR;
   volatile unsigned int MISC0_TOG;
   volatile unsigned int MISC1;
   volatile unsigned int MISC1_SET;
   volatile unsigned int MISC1_CLR;
   volatile unsigned int MISC1_TOG;
   volatile unsigned int MISC2;
   volatile unsigned int MISC2_SET;
   volatile unsigned int MISC2_CLR;
   volatile unsigned int MISC2_TOG;
} CCM_ANALOG_Type; 

/* 
* IOMUX寄存器组
*/
typedef struct 
{
   volatile unsigned int BOOT_MODE0;
   volatile unsigned int BOOT_MODE1;
   volatile unsigned int SNVS_TAMPER0;
   volatile unsigned int SNVS_TAMPER1;
   volatile unsigned int SNVS_TAMPER2;
   volatile unsigned int SNVS_TAMPER3;
   volatile unsigned int SNVS_TAMPER4;
   volatile unsigned int SNVS_TAMPER5;
   volatile unsigned int SNVS_TAMPER6;
   volatile unsigned int SNVS_TAMPER7;
   volatile unsigned int SNVS_TAMPER8;
   volatile unsigned int SNVS_TAMPER9;
   volatile unsigned int JTAG_MOD;
   volatile unsigned int JTAG_TMS;
   volatile unsigned int JTAG_TDO;
   volatile unsigned int JTAG_TDI;
   volatile unsigned int JTAG_TCK;
   volatile unsigned int JTAG_TRST_B;
   volatile unsigned int GPIO1_IO00;
   volatile unsigned int GPIO1_IO01;
   volatile unsigned int GPIO1_IO02;
   volatile unsigned int GPIO1_IO03;
   volatile unsigned int GPIO1_IO04;
   volatile unsigned int GPIO1_IO05;
   volatile unsigned int GPIO1_IO06;
   volatile unsigned int GPIO1_IO07;
   volatile unsigned int GPIO1_IO08;
   volatile unsigned int GPIO1_IO09;
   volatile unsigned int UART1_TX_DATA;
   volatile unsigned int UART1_RX_DATA;
   volatile unsigned int UART1_CTS_B;
   volatile unsigned int UART1_RTS_B;
   volatile unsigned int UART2_TX_DATA;
   volatile unsigned int UART2_RX_DATA;
   volatile unsigned int UART2_CTS_B;
   volatile unsigned int UART2_RTS_B;
   volatile unsigned int UART3_TX_DATA;
   volatile unsigned int UART3_RX_DATA;
   volatile unsigned int UART3_CTS_B;
   volatile unsigned int UART3_RTS_B;
   volatile unsigned int UART4_TX_DATA;
   volatile unsigned int UART4_RX_DATA;
   volatile unsigned int UART5_TX_DATA;
   volatile unsigned int UART5_RX_DATA;
   volatile unsigned int ENET1_RX_DATA0;
   volatile unsigned int ENET1_RX_DATA1;
   volatile unsigned int ENET1_RX_EN;
   volatile unsigned int ENET1_TX_DATA0;
   volatile unsigned int ENET1_TX_DATA1;
   volatile unsigned int ENET1_TX_EN;
   volatile unsigned int ENET1_TX_CLK;
   volatile unsigned int ENET1_RX_ER;
   volatile unsigned int ENET2_RX_DATA0;
   volatile unsigned int ENET2_RX_DATA1;
   volatile unsigned int ENET2_RX_EN;
   volatile unsigned int ENET2_TX_DATA0;
   volatile unsigned int ENET2_TX_DATA1;
   volatile unsigned int ENET2_TX_EN;
   volatile unsigned int ENET2_TX_CLK;
   volatile unsigned int ENET2_RX_ER;
   volatile unsigned int LCD_CLK;
   volatile unsigned int LCD_ENABLE;
   volatile unsigned int LCD_HSYNC;
   volatile unsigned int LCD_VSYNC;
   volatile unsigned int LCD_RESET;
   volatile unsigned int LCD_DATA00;
   volatile unsigned int LCD_DATA01;
   volatile unsigned int LCD_DATA02;
   volatile unsigned int LCD_DATA03;
   volatile unsigned int LCD_DATA04;
   volatile unsigned int LCD_DATA05;
   volatile unsigned int LCD_DATA06;
   volatile unsigned int LCD_DATA07;
   volatile unsigned int LCD_DATA08;
   volatile unsigned int LCD_DATA09;
   volatile unsigned int LCD_DATA10;
   volatile unsigned int LCD_DATA11;
   volatile unsigned int LCD_DATA12;
   volatile unsigned int LCD_DATA13;
   volatile unsigned int LCD_DATA14;
   volatile unsigned int LCD_DATA15;
   volatile unsigned int LCD_DATA16;
   volatile unsigned int LCD_DATA17;
   volatile unsigned int LCD_DATA18;
   volatile unsigned int LCD_DATA19;
   volatile unsigned int LCD_DATA20;
   volatile unsigned int LCD_DATA21;
   volatile unsigned int LCD_DATA22;
   volatile unsigned int LCD_DATA23;
   volatile unsigned int NAND_RE_B;
   volatile unsigned int NAND_WE_B;
   volatile unsigned int NAND_DATA00;
   volatile unsigned int NAND_DATA01;
   volatile unsigned int NAND_DATA02;
   volatile unsigned int NAND_DATA03;
   volatile unsigned int NAND_DATA04;
   volatile unsigned int NAND_DATA05;
   volatile unsigned int NAND_DATA06;
   volatile unsigned int NAND_DATA07;
   volatile unsigned int NAND_ALE;
   volatile unsigned int NAND_WP_B;
   volatile unsigned int NAND_READY_B;
   volatile unsigned int NAND_CE0_B;
   volatile unsigned int NAND_CE1_B;
   volatile unsigned int NAND_CLE;
   volatile unsigned int NAND_DQS;
   volatile unsigned int SD1_CMD;
   volatile unsigned int SD1_CLK;
   volatile unsigned int SD1_DATA0;
   volatile unsigned int SD1_DATA1;
   volatile unsigned int SD1_DATA2;
   volatile unsigned int SD1_DATA3;
   volatile unsigned int CSI_MCLK;
   volatile unsigned int CSI_PIXCLK;
   volatile unsigned int CSI_VSYNC;
   volatile unsigned int CSI_HSYNC;
   volatile unsigned int CSI_DATA00;
   volatile unsigned int CSI_DATA01;
   volatile unsigned int CSI_DATA02;
   volatile unsigned int CSI_DATA03;
   volatile unsigned int CSI_DATA04;
   volatile unsigned int CSI_DATA05;
   volatile unsigned int CSI_DATA06;
   volatile unsigned int CSI_DATA07;
}IOMUX_SW_MUX_Type;

typedef struct 
{
   volatile unsigned int DRAM_ADDR00;
   volatile unsigned int DRAM_ADDR01;
   volatile unsigned int DRAM_ADDR02;
   volatile unsigned int DRAM_ADDR03;
   volatile unsigned int DRAM_ADDR04;
   volatile unsigned int DRAM_ADDR05;
   volatile unsigned int DRAM_ADDR06;
   volatile unsigned int DRAM_ADDR07;
   volatile unsigned int DRAM_ADDR08;
   volatile unsigned int DRAM_ADDR09;
   volatile unsigned int DRAM_ADDR10;
   volatile unsigned int DRAM_ADDR11;
   volatile unsigned int DRAM_ADDR12;
   volatile unsigned int DRAM_ADDR13;
   volatile unsigned int DRAM_ADDR14;
   volatile unsigned int DRAM_ADDR15;
   volatile unsigned int DRAM_DQM0;
   volatile unsigned int DRAM_DQM1;
   volatile unsigned int DRAM_RAS_B;
   volatile unsigned int DRAM_CAS_B;
   volatile unsigned int DRAM_CS0_B;
   volatile unsigned int DRAM_CS1_B;
   volatile unsigned int DRAM_SDWE_B;
   volatile unsigned int DRAM_ODT0;
   volatile unsigned int DRAM_ODT1;
   volatile unsigned int DRAM_SDBA0;
   volatile unsigned int DRAM_SDBA1;
   volatile unsigned int DRAM_SDBA2;
   volatile unsigned int DRAM_SDCKE0;
   volatile unsigned int DRAM_SDCKE1;
   volatile unsigned int DRAM_SDCLK0_P;
   volatile unsigned int DRAM_SDQS0_P;
   volatile unsigned int DRAM_SDQS1_P;
   volatile unsigned int DRAM_RESET;
   volatile unsigned int TEST_MODE;
   volatile unsigned int POR_B;
   volatile unsigned int ONOFF;
   volatile unsigned int SNVS_PMIC_ON_REQ;
   volatile unsigned int CCM_PMIC_STBY_REQ;
   volatile unsigned int BOOT_MODE0;
   volatile unsigned int BOOT_MODE1;
   volatile unsigned int SNVS_TAMPER0;
   volatile unsigned int SNVS_TAMPER1;
   volatile unsigned int SNVS_TAMPER2;
   volatile unsigned int SNVS_TAMPER3;
   volatile unsigned int SNVS_TAMPER4;
   volatile unsigned int SNVS_TAMPER5;
   volatile unsigned int SNVS_TAMPER6;
   volatile unsigned int SNVS_TAMPER7;
   volatile unsigned int SNVS_TAMPER8;
   volatile unsigned int SNVS_TAMPER9;
   volatile unsigned int JTAG_MOD;
   volatile unsigned int JTAG_TMS;
   volatile unsigned int JTAG_TDO;
   volatile unsigned int JTAG_TDI;
   volatile unsigned int JTAG_TCK;
   volatile unsigned int JTAG_TRST_B;
   volatile unsigned int GPIO1_IO00;
   volatile unsigned int GPIO1_IO01;
   volatile unsigned int GPIO1_IO02;
   volatile unsigned int GPIO1_IO03;
   volatile unsigned int GPIO1_IO04;
   volatile unsigned int GPIO1_IO05;
   volatile unsigned int GPIO1_IO06;
   volatile unsigned int GPIO1_IO07;
   volatile unsigned int GPIO1_IO08;
   volatile unsigned int GPIO1_IO09;
   volatile unsigned int UART1_TX_DATA;
   volatile unsigned int UART1_RX_DATA;
   volatile unsigned int UART1_CTS_B;
   volatile unsigned int UART1_RTS_B;
   volatile unsigned int UART2_TX_DATA;
   volatile unsigned int UART2_RX_DATA;
   volatile unsigned int UART2_CTS_B;
   volatile unsigned int UART2_RTS_B;
   volatile unsigned int UART3_TX_DATA;
   volatile unsigned int UART3_RX_DATA;
   volatile unsigned int UART3_CTS_B;
   volatile unsigned int UART3_RTS_B;
   volatile unsigned int UART4_TX_DATA;
   volatile unsigned int UART4_RX_DATA;
   volatile unsigned int UART5_TX_DATA;
   volatile unsigned int UART5_RX_DATA;
   volatile unsigned int ENET1_RX_DATA0;
   volatile unsigned int ENET1_RX_DATA1;
   volatile unsigned int ENET1_RX_EN;
   volatile unsigned int ENET1_TX_DATA0;
   volatile unsigned int ENET1_TX_DATA1;
   volatile unsigned int ENET1_TX_EN;
   volatile unsigned int ENET1_TX_CLK;
   volatile unsigned int ENET1_RX_ER;
   volatile unsigned int ENET2_RX_DATA0;
   volatile unsigned int ENET2_RX_DATA1;
   volatile unsigned int ENET2_RX_EN;
   volatile unsigned int ENET2_TX_DATA0;
   volatile unsigned int ENET2_TX_DATA1;
   volatile unsigned int ENET2_TX_EN;
   volatile unsigned int ENET2_TX_CLK;
   volatile unsigned int ENET2_RX_ER;
   volatile unsigned int LCD_CLK;
   volatile unsigned int LCD_ENABLE;
   volatile unsigned int LCD_HSYNC;
   volatile unsigned int LCD_VSYNC;
   volatile unsigned int LCD_RESET;
   volatile unsigned int LCD_DATA00;
   volatile unsigned int LCD_DATA01;
   volatile unsigned int LCD_DATA02;
   volatile unsigned int LCD_DATA03;
   volatile unsigned int LCD_DATA04;
   volatile unsigned int LCD_DATA05;
   volatile unsigned int LCD_DATA06;
   volatile unsigned int LCD_DATA07;
   volatile unsigned int LCD_DATA08;
   volatile unsigned int LCD_DATA09;
   volatile unsigned int LCD_DATA10;
   volatile unsigned int LCD_DATA11;
   volatile unsigned int LCD_DATA12;
   volatile unsigned int LCD_DATA13;
   volatile unsigned int LCD_DATA14;
   volatile unsigned int LCD_DATA15;
   volatile unsigned int LCD_DATA16;
   volatile unsigned int LCD_DATA17;
   volatile unsigned int LCD_DATA18;
   volatile unsigned int LCD_DATA19;
   volatile unsigned int LCD_DATA20;
   volatile unsigned int LCD_DATA21;
   volatile unsigned int LCD_DATA22;
   volatile unsigned int LCD_DATA23;
   volatile unsigned int NAND_RE_B;
   volatile unsigned int NAND_WE_B;
   volatile unsigned int NAND_DATA00;
   volatile unsigned int NAND_DATA01;
   volatile unsigned int NAND_DATA02;
   volatile unsigned int NAND_DATA03;
   volatile unsigned int NAND_DATA04;
   volatile unsigned int NAND_DATA05;
   volatile unsigned int NAND_DATA06;
   volatile unsigned int NAND_DATA07;
   volatile unsigned int NAND_ALE;
   volatile unsigned int NAND_WP_B;
   volatile unsigned int NAND_READY_B;
   volatile unsigned int NAND_CE0_B;
   volatile unsigned int NAND_CE1_B;
   volatile unsigned int NAND_CLE;
   volatile unsigned int NAND_DQS;
   volatile unsigned int SD1_CMD;
   volatile unsigned int SD1_CLK;
   volatile unsigned int SD1_DATA0;
   volatile unsigned int SD1_DATA1;
   volatile unsigned int SD1_DATA2;
   volatile unsigned int SD1_DATA3;
   volatile unsigned int CSI_MCLK;
   volatile unsigned int CSI_PIXCLK;
   volatile unsigned int CSI_VSYNC;
   volatile unsigned int CSI_HSYNC;
   volatile unsigned int CSI_DATA00;
   volatile unsigned int CSI_DATA01;
   volatile unsigned int CSI_DATA02;
   volatile unsigned int CSI_DATA03;
   volatile unsigned int CSI_DATA04;
   volatile unsigned int CSI_DATA05;
   volatile unsigned int CSI_DATA06;
   volatile unsigned int CSI_DATA07;
   volatile unsigned int GRP_ADDDS;
   volatile unsigned int GRP_DDRMODE_CTL;
   volatile unsigned int GRP_B0DS;
   volatile unsigned int GRP_DDRPK;
   volatile unsigned int GRP_CTLDS;
   volatile unsigned int GRP_B1DS;
   volatile unsigned int GRP_DDRHYS;
   volatile unsigned int GRP_DDRPKE;
   volatile unsigned int GRP_DDRMODE;
   volatile unsigned int GRP_DDR_TYPE;
}IOMUX_SW_PAD_Type;

/* 
* GPIO寄存器结构体
*/
typedef struct 
{
   volatile unsigned int DR;							
   volatile unsigned int GDIR; 							
   volatile unsigned int PSR;								
   volatile unsigned int ICR1; 							
   volatile unsigned int ICR2; 							 
   volatile unsigned int IMR;								 
   volatile unsigned int ISR;			
   volatile unsigned int EDGE_SEL;  
}GPIO_Type;


/* 
* 外设指针 
*/
#define CCM					((CCM_Type *)CCM_BASE)
#define CCM_ANALOG			((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
#define IOMUX_SW_MUX		((IOMUX_SW_MUX_Type *)IOMUX_SW_MUX_BASE)
#define IOMUX_SW_PAD		((IOMUX_SW_PAD_Type *)IOMUX_SW_PAD_BASE)
#define GPIO1				((GPIO_Type *)GPIO1_BASE)
#define GPIO2				((GPIO_Type *)GPIO2_BASE)
#define GPIO3				((GPIO_Type *)GPIO3_BASE)
#define GPIO4				((GPIO_Type *)GPIO4_BASE)
#define GPIO5				((GPIO_Type *)GPIO5_BASE)

3、修改驱动

#include "imx6ul.h"
void clk_enable(void)
{
   CCM->CCGR0 = 0XFFFFFFFF;
   CCM->CCGR1 = 0XFFFFFFFF;

   CCM->CCGR2 = 0XFFFFFFFF;
   CCM->CCGR3 = 0XFFFFFFFF;
   CCM->CCGR4 = 0XFFFFFFFF;
   CCM->CCGR5 = 0XFFFFFFFF;
   CCM->CCGR6 = 0XFFFFFFFF;
}

void led_init(void)
{
   IOMUX_SW_MUX->GPIO1_IO03 = 0X5;	
   IOMUX_SW_PAD->GPIO1_IO03 = 0X10B0;
   GPIO1->GDIR = 0X0000008;	
   GPIO1->DR &= ~(1 << 3);	
   
}

void led_on(void)
{
   GPIO1->DR &= ~(1<<3); 
}


void led_off(void)
{
   GPIO1->DR |= (1<<3); 
}


void delay_short(volatile unsigned int n)
{
   while(n--){}
}

void delay(volatile unsigned int n)
{
   while(n--)
   {
   	delay_short(0x7ff);
   }
}

int main(void)
{
   clk_enable();
   led_init();	

   while(1)
   {	
   	led_off();	
   	delay(500);	

   	led_on();
   	delay(500);
   }

   return 0;
}
✎﹏ℳ๓无情❦
关注
  • 0
    点赞
  • 踩
  • 1
    收藏
    觉得还不错? 一键收藏
  • 0
    评论
专栏目录
I.MX6U-裸机-stm32版LED实验（3）
m0_60524373的博客
11-15 928
本文和（1）只有main.c程序不一样，具体如下： #include "imx6ul.h" // @description : 使能I.MX6U所有外设时钟 void clk_enable(void) { CCM->CCGR0 = 0XFFFFFFFF; CCM->CCGR1 = 0XFFFFFFFF; CCM->CCGR2 = 0XFFFFFFFF; CCM->CCGR3 = 0XFFFFFFFF; CCM->CCGR4 = 0XFFFFFF
I.MAX6ULL与STM32启动方式对比
hurryddd
04-19 1952
前言 I.MAX6U是一款NXP出品的，528~900MHz的Cortex-A7内核的MPU 一、STM32启动方式 1、启动方式 使用过STM32芯片的人肯定都知道，STM32的启动方式可以通过BOOT0和BOOT1两个引脚来设置，这两引脚是可以外接电路来控制高低电平的，这样就可以控制STM32单片机上电的启动方式了。如下表，启动方式的选择。 BOOT0 ...
[I.MX6UL] 用STM32的方式来写I.MX6UL程序
jianqiang.xue
05-19 585
【代码】[I.MX6UL] 用STM32的方式来写I.MX6UL程序。
I.MX6U-ALPHA开发板（SPI实验）
qq_61540355的博客
08-28 416
SPI实验
第3讲 I.MX6U-ALPHA开发板简介_I.MX6U_Alpha_开发板简介_
10-01
第3讲 I.MX6U-ALPHA开发板简介，正点原子资料
I.MX6U-ALPHA 开发板学习 —— 从基础汇编指令到点亮LED
01-06
参考《【正点原子】I.MX6U嵌入式Linux驱动开发指南V1.0》 目录【1】 Arm与Cortex【1.1】 Arm下的字节、半字和字【2】 交叉编译简介【2.1】 安装步骤【3】汇编语法【3.1】 GNU 汇编语法【3.2】Cortex-A7 常用汇编...
Linux独立开发项目（安防监控），基于正点原子I.MX6ULL-ALPHA开发板.zip
02-10
嵌入式Linux开发
MX6U-ALPHA开发平台介绍.docx
03-19
MX6U-ALPHA 开发平台是一个功能强大、性能优越的开发板，适合移动设备和嵌入式系统的开发，开发者可以使用 Linux 驱动开发来充分发挥 Cortex-A7 MPCore 架构的性能。 MX6U-ALPHA 开发平台的主要特性包括： * 基于 ...
【正点原子】I.MX6U嵌入式Linux驱动开发指南V1.6
02-08
I.MX6U嵌入式Linux驱动开发指南V1.6 本资源摘要信息涵盖了I.MX6U嵌入式Linux驱动开发指南V1.6的主要内容，包括Linux驱动开发、ARM处理器、嵌入式系统、服务器运维等方面的知识点。 一、Linux驱动开发基础 * Linux...
STM32的FreeRtos的学习
腹有诗词气自华
06-09 642
还要在stm32f10x_it.c文件中把刚刚宏定义的三个函数注释掉：107行 126行 135行。至此编译主函数下载到单片机中就能看到PC13的小灯在闪烁了。其他的地方我也不懂呢？今天第一天开始学习。至此所需要的文件就全部拷贝齐全了，接下来就是在工程中添加各个文件了。下载下来的是一个zip文件，解压缩了。1：声明一个任务句柄。2：创建一个任务函数。
STM32 MDK Keil5软件调试功能使用（无需连接硬件）
ajream的博客
06-05 743
首先点击工具栏的魔术棒配置一下：（记得选择自己的STM32芯片类型）开启调试。
stm32编写Modbus步骤
robin__su的博客
06-09 1248
539 //Modbus功能码16处理程序 /////////////////////////////////////////////////////////////////////////////////////////////////已验证程序OK。488 //Modbus功能码03处理程序///////////////////////////////////////////////////////////////////////////////////////已验证程序OK。
怎么在stm32上跑自己的神经网络
qq_43745917的博客
06-04 1828
基本步骤为先跑出神经网络得到xxx.h5文件，然后用cubemx把h5文件移植到stm32中，然后初始化设置输入输出，实时输入数据进行神经网络检测，需要做的工作主要有：会写或者会改神经网络代码，输出.h5文件（使用Tesoroflow产生得有版本要求，太高得可能不行），使用cubemx来移植到stm32上；1、 自行上网查询stm32AI教程，网上90%的教程会教到能把官方例程跑出来，使用cubemx进行验证（跑不出来，检查步骤有无错误，时钟设置是否正确，串口设置是否正确）
stm32MP135裸机编程：修改官方GPIO例程在DDR中点亮第一颗LED灯
kevin1499的博客
06-11 544
本文详细介绍了使用stm32mp135基于官方GPIO例程，在DDR中点亮一颗LED灯的方法。
STM32 | 独立看门狗 | RTC(实时时钟)
m0_45463480的博客
06-10 948
STM32 | 独立看门狗 | RTC(实时时钟)
STM32--DMA
qq_47258284的博客
06-03 1473
DMA，全称为：，即直接存储器访问。DMA传输方式无需CPU直接控制传输，也没有中断处理方式那样保留现场和恢复现场的过程，与I/O，能使 CPU的效率大为提高。STM32F407最多有2个DMA控制器(DMA1和DMA2)，两个DMA控制器总共有16个数据流。每个通道专门用来管理来自于一个或多个外设对存储器访问的请求。还有一个仲裁器来协调各个 DMA请求的优先权。二、配置步骤调用函数初始化DMA。
STM32 ST-LINK Utility的下载安装使用说明如下：
最新发布
jingling122的博客
06-11 700
File（文件）Open File（打开文件）：允许用户打开要编程到STM32设备的.hex或.bin文件。Save（保存）：可以将当前显示的STM32内存内容保存为文件。Exit（退出）：关闭STM32 ST-LINK Utility。Target（目标）Connect（连接）：连接到STM32设备。通常，连接后软件会自动识别设备。Disconnect（断开连接）：断开与STM32设备的连接。Program（编程）：开始编程之前选中的文件到STM32设备。Erase Chip（擦除芯片）
STM32硬件接口I2C应用（基于HMC5883L）
mftang的博客
06-11 1029
本文主要介绍STM32F4的内部I2C接口的使用方法，包括使用STM32Cube配置i2c接口函数，还介绍了STM32 HAL库中的接口函数，为了验证接口函数的是否能够正常工作，还使用HMC5883L作为device，以I2C接口作为通信接口，以实现该芯片数据的读写操作。
I.MX6U-ALPHA开发板的介绍
04-28
I.MX6U-ALPHA开发板是一款基于NXP i.MX6U处理器的嵌入式开发板。它具有丰富的外设接口，包括多个串口、以太网接口、USB接口、SD卡接口等，可以满足嵌入式系统开发的各种需求。此外，该开发板还支持多种操作系统，...

“相关推荐”对你有帮助么？

  • 非常没帮助
  • 没帮助
  • 一般
  • 有帮助
  • 非常有帮助
提交
评论
添加红包

请填写红包祝福语或标题

个

红包个数最小为10个

元

红包金额最低5元

当前余额3.43元 前往充值 >
需支付：10.00元
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付元
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明：

1.余额是钱包充值的虚拟货币，按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载，可以购买VIP、付费专栏及课程。

余额充值