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硬件课程设计报告 |
RISC模型机的设计 |
一、设计目的
对所学计算机硬件课程进行系统化,进一步提高硬件设计及动手能力。
二、设计内容与要求
(1)选用使用频率比较高的五条基本指令:MOV、ADD、STORE、LOAD、JMP。
(2)寻址方式采用寄存器寻址及直接寻址两种方式。
(3)指令格式采用单字长及双字长两种格式。
(4)设计不采用微程序,在CPLD中设计控制逻辑。
三、设计原理
1. 指令格式
单字长指令格式为:
操作码 |
RS |
RD |
双字长指令格式为:
操作码 |
RS |
RD |
ADDR |
其中RS、RD为不同状态,则选中不同的寄存器:
RS或RD |
寄存器 |
00 01 10 11 |
R0 R1 R2 Ac |
指令系统如下:
MOV RS, RD
ADD RS, RD
JMP RS
LOAD [ADDR], RD
STORE RS, [ADDR]
MOV,ADD,JMP三条指令为单周期执行完成。STORE,LOAD两条指令为两周期执行完成,ADDR为存或取数的直接地址。第一机器周期完成取操作码、作标记;第二机器周期完成取直接地址并完成取数或存数。
2. 指令周期执行流程
3. RISC模型机数据通路图
图中PLD模块用able语言设计来实现,它是用来产生各部件的控制信号。其余模块根据设备上提供的资源用硬布线来构成。
四、具体设计及结果分析
1. 实验步骤
(1)在ispDesignEXPERT 系统中建立RISC设计项目,包括顶层模块原理图(top.sch),PLD子模块程序,经编译,将生成的JED文件下载至CPLD芯片ispLSI1032中。
(2)按所给的接线图连接线路。
(3)用所设计的指令系统,编写一段机器指令程序。
(4)运行CMPP20进行联机,将上述程序装载到实验系统的RAM中。
(5)将时序单元的STOP开关拨至RUN状态,STEP开关拨至STEP状态,通过按START微动开关,来单步机器指令,可通过地址显示灯检查指令执行的地址,运行完后检查RAM中的运算结果。
实验中若将时序单元(STATE UNIT)中的Φ接至信号源单元(SIGNAL UNIT)的H23上则可用来单步执行机器指令操作;若将Φ接至KK2+上则可单步执行每个节拍来调试实验程序,其方法是将STEP开关拨至EXEC状态后,按一下START启动键,然后每按动一次KK2键产生一个节拍。
(6)联机运行程序时,进入软件界面,装载机器指令后,选择RISC通路图,按相应功能键即可联机运行、监控、调试程序。
2. CPLD芯片设计
顶层模块电路图(top.sch)