ZLAN-212 Low Jitter Synchronizer Power Supply Decoupling and Layout Practices

ZLAN-212 Low Jitter Synchronizer Power Supply Decoupling and Layout Practices

Each power island should have a bulk cap of at least 10 µF with very low ESR. Ceramic provides the lowest ESR but tantalum may also be acceptable. These capacitors are used to filter low frequency (up to several hundreds KHz) noise that originate from switching power supplies. If the switching power supply is not filtered with large bulk capacitances (100 µF or more), then the 10 µf capacitors used for 1.8 V core voltage supplies (AVCORE and VCORE) should be replaced with low ESR 100 µF ceramic or tantalum capacitors. A 0.1 µF decoupling cap (ceramic X5R or X7R) must be allocated for each power pin and placed as close as possible to the via connected to the power pin. The smallest available package size should be used. Each decoupling cap should be connected directly to only one power pin, and should not share vias to power or ground with other caps. Priority should be given to placement of decoupling caps in nearest proximity to AVDD and AVCORE pins. AVCORE pins B7 and H2 in Figure 1 and pins B6 and F1 in Figure 2 draw 25 mA each. This requires the series resistor to disipate at least 1.25 mW of power.