慢慢欣赏linux 继续深入学习x86中断3 pch中断

int pch_gpio_probe(struct pci_dev *pdev,
				    const struct pci_device_id *id)
{
	struct pch_gpio *chip = kzalloc(sizeof(*chip), GFP_KERNEL);
	int irq_base;
	
	chip->dev = &pdev->dev;
	ret = pci_enable_device(pdev);	
	ret = pci_request_regions(pdev, KBUILD_MODNAME);	
	chip->base = pci_iomap(pdev, 1, 0);
	
	chip->reg = chip->base;
	pci_set_drvdata(pdev, chip);
	
	pch_gpio_setup(chip);
	ret = gpiochip_add_data(&chip->gpio, chip);
	
	irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0,
					gpio_pins[chip->ioh], NUMA_NO_NODE);	// 有可能静态分配irq_desc 或者动态 kmalloc 申请
	
	chip->irq_base = irq_base;

	/* Mask all interrupts, but enable them */
	msk = (1 << gpio_pins[chip->ioh]) - 1;
	iowrite32(msk, &chip->reg->imask);
	iowrite32(msk, &chip->reg->ien);
	
	ret = devm_request_irq(&pdev->dev, pdev->irq, pch_gpio_handler,
			       IRQF_SHARED, KBUILD_MODNAME, chip);
				   
	ret = pch_gpio_alloc_generic_chip(chip, irq_base,
					  gpio_pins[chip->ioh]);
	=>int pch_gpio_alloc_generic_chip(struct pch_gpio *chip,
				       unsigned int irq_start,
				       unsigned int num)
	{
		struct irq_chip_generic *gc = devm_irq_alloc_generic_chip(chip->dev, "pch_gpio", 1, irq_start,
					 chip->base, handle_simple_irq);
		struct irq_chip_type *ct = gc->chip_types;
		gc->private = chip;

		ct->chip.irq_ack = pch_irq_ack;
		ct->chip.irq_mask = pch_irq_mask;
		ct->chip.irq_unmask = pch_irq_unmask;
		ct->chip.irq_set_type = pch_irq_type;

		rv = devm_irq_setup_generic_chip(chip->dev, gc, IRQ_MSK(num),
						 IRQ_GC_INIT_MASK_CACHE,
						 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
	}
}