make是一个命令工具,是一个解释makefile中指令的命令工具,一般来说,大多数的IDE都有这个命令,比如:Delphi的make,[Visual C++](https://baike.baidu.com/item/Visual C%2B%2B)的nmake,Linux下GNU的make。可见,makefile都成为了一种在工程方面的编译方法。
作用:
- “自动化编译”:一旦写好,只需要一个make命令,整个工程完全自动编译,极大的提高了软件开发的效率;
- 提升编译效率:再次编译,只编译修改的文件。
Makefile基本语法
target… : prerequisites …
command
target也就是一个目标文件,可以是Object File,也可以是执行文件。还可以是一个标签(Label),对于标签这种特性,在后续的“伪目标”章节中会有叙述。
prerequisites就是,要生成那个target所需要的文件或是目标。
command也就是make需要执行的命令。(任意的Shell命令)
执行命令:
make [定义的参数]
如:make 执行;make clean 执行clean下的命令
#.c -> exe
#test:add.c sub.c test.c
# gcc add.c sub.c test.c -o test
#.c ->.o ->exe
test:add.o sub.o test.o
gcc add.o sub.o test.o -o test
add.o:add.c
gcc -c add.c -o add.o
sub.o:sub.c
gcc -c sub.c -o sub.o
test.o:test.c
gcc -c test.c -o test.o
.PHONY:clean
clean:
rm ./*.o
#SRC = add.o sub.o test.o
SRC = add.o
SRC += sub.o
SRC += test.o
#.c ->.o ->exe
test:$(SRC)
gcc ${SRC} -o test
add.o:add.c
gcc -c add.c -o add.o
sub.o:sub.c
gcc -c sub.c -o sub.o
test.o:test.c
gcc -c test.c -o test.o
.PHONY:clean
clean:
rm ./*.o
#SRC = add.o sub.o test.o
SRC = add.o
SRC += sub.o
SRC += test.o
#.c ->.o ->exe
test:$(SRC)
gcc ${SRC} -o $@
#@echo $$+ = $+ #$+ = add.o sub.o test.o
#@echo $^ #add.o sub.o test.o
#@echo $< #add.o
add.o:add.c
gcc -c $^ -o $@
#echo $*
#echo $@
sub.o:sub.c
gcc -c $^ -o $@
test.o:test.c
gcc -c $^ -o $@
.PHONY:clean
clean:
rm ./*.o
SRC = add.o
SRC += sub.o
SRC += test.o
CC = gcc
CFLAGS = -c -g -Wall -I /home/admin/Desktop/makefile04/include
#CC = arm-linux-gcc
#.c ->.o ->exe
test:$(SRC)
${CC} ${SRC} -o $@
%.o:%.c
${CC} ${CFLAGS} $^ -o $@
#sub.o:sub.c
# ${CC} ${CFLAGS} $^ -o $@
#test.o:test.c
# ${CC} ${CFLAGS} $^ -o $@
.PHONY:clean
clean:
rm ./*.o
SRC = add.o
SRC += sub.o
SRC += test.o
ARCH = X86
ifeq ($(ARCH),X86)
CC = gcc
endif
CFLAGS = -c -g -Wall -I /home/admin/Desktop/makefile/makefile05/include
#CC = arm-linux-gcc
#.c ->.o ->exe
test:$(SRC)
${CC} ${SRC} -o $@
%.o:%.c
${CC} ${CFLAGS} $^ -o $@
#sub.o:sub.c
# ${CC} ${CFLAGS} $^ -o $@
#test.o:test.c
# ${CC} ${CFLAGS} $^ -o $@
.PHONY:clean
clean:
rm ./*.o
SRC = $(wildcard *.c)
OBJ = $(patsubst %.c, %.o, $(SRC))
#all:
# echo $(SRC)
define MYFUN
echo "*******"
echo $(0)
echo $(1)
echo $(2)
endef
CC = gcc
CFLAGS = -c -g -Wall -I /home/admin/Desktop/makefile/makefile06/include
test:$(OBJ)
${CC} $^ -o $@
$(call MYFUN,10,20)
%.o:%.c
${CC} ${CFLAGS} $^ -o $@
.PHONY:clean
clean:
rm ./*.o
#----------
# *.c->src
# *.o->obj
#
SRCDIR = ./src
SRC = $(wildcard $(SRCDIR)/*.c)
OBJ = $(patsubst %.c, $(OBJDIR)/%.o, $(notdir $(SRC)))
OBJDIR = $(shell pwd)/obj
#make -C xxx
all:$(SRCDIR) ECHO test
$(SRCDIR):ECHO
make -C $@
CC = gcc
CFLAGS = -c -g -Wall -I /home/admin/Desktop/makefile/makefile07/include
export CC CFLAGS OBJ OBJDIR
ECHO:
echo $(SRCDIR)
echo "begin...."
test:$(OBJ)
${CC} $^ -o $@
.PHONY:clean
clean:
rm $(OBJDIR)/*.o
编译当前目录程序
SRC = $(wildcard *.c)
OBJ = $(patsubst %.c, %.o, $(SRC))
CFLAGS = -c -g -Wall
CC = gcc
fun:$(OBJ)
${CC} $^ -o $@
%.o:%.c
${CC} ${CFLAGS} $^ -o $@
.PHONY:clean
clean:
rm *.o