APIC Timer

apicTimerInit


#define APIC_REG_TIMER 0x320 /* LVT (Timer)      */
#define APIC_REG_TIMER_ICR 0x380 /* Timer Initial Count Reg    */
#define APIC_REG_TIMER_CCR 0x390 /* Timer Current Count Reg    */
#define APIC_REG_TIMER_CONFIG 0x3e0 /* Timer Divide Config Reg    */




10.5.4  APIC Timer


the divide configuration register
000: Divide by 2
001: Divide by 4
010: Divide by 8
011: Divide by 16
100: Divide by 32
101: Divide by 64
110: Divide by 128
111: Divide by 1




the initial-countregister -- read-write register
A write of 0 to the initial-count register effectively stops the local APIC timer, in both one-shot and periodic mode.




the current-count register -- read only
In one-shot mode, the 
timer is started by programming its initial-count register. The initial count value is then copied into the current-
count register and count-down begins. After the timer reaches zero, an timer interrupt is generated and the timer 
remains at its 0 value until reprogrammed. 


In periodic mode, the current-count register is automatically reloaded from the initial-count register when the 
count reaches 0.
If during the count-down 
process the initial-count register is set, counting will restart, using the new initial-count value. 


the LVT timer register
The timer can be configured through the timer LVT entry for one-shot or periodic operation.


The time base for the timer is derived from the processor’s bus clock, divided by the value specified in the divide 
configuration register.